/*
* linux/arch/m32r/boot/setup.S -- A setup code.
*
- * Copyright (C) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata,
- * and Hitoshi Yamamoto
+ * Copyright (C) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
+ * Hitoshi Yamamoto, Hayato Fujiwara
*
*/
-/* $Id$ */
#include <linux/linkage.h>
#include <asm/segment.h>
#include <asm/page.h>
#include <asm/pgtable.h>
-#include <linux/config.h>
#include <asm/assembler.h>
#include <asm/mmu_context.h>
#include <asm/m32r.h>
#define CPU_PARAMS boot_cpu_data
#define M32R_MCICAR 0xfffffff0
#define M32R_MCDCAR 0xfffffff4
-#define M32R_MCCR 0xfffffffc
+#define M32R_MCCR 0xfffffffc
#define M32R_BSCR0 0xffffffd2
;BSEL
ldi r1, #0x73 ; cache on (with invalidation)
; ldi r1, #0x00 ; cache off
st r1, @r0
+#elif defined(CONFIG_CHIP_M32102)
+ ldi r0, #-4 ;LDIMM (r0, M32R_MCCR)
+ ldi r1, #0x101 ; cache on (with invalidation)
+; ldi r1, #0x00 ; cache off
+ st r1, @r0
+#elif defined(CONFIG_CHIP_M32104)
+ ldi r0, #-96 ; DNCR0
+ seth r1, #0x0060 ; from 0x00600000
+ or3 r1, r1, #0x0005 ; size 2MB
+ st r1, @r0
+ seth r1, #0x0100 ; from 0x01000000
+ or3 r1, r1, #0x0003 ; size 16MB
+ st r1, @+r0
+ seth r1, #0x0200 ; from 0x02000000
+ or3 r1, r1, #0x0002 ; size 32MB
+ st r1, @+r0
+ ldi r0, #-4 ;LDIMM (r0, M32R_MCCR)
+ ldi r1, #0x703 ; cache on (with invalidation)
+ st r1, @r0
#else
#error unknown chip configuration
#endif
st r1, @(MATM_offset,r0) ; Set MATM (T bit ON)
ld r0, @(MATM_offset,r0) ; Check
#else
+#if defined(CONFIG_CHIP_M32700)
seth r0,#high(M32R_MCDCAR)
or3 r0,r0,#low(M32R_MCDCAR)
ld24 r1,#0x8080
st r1,@r0
+#elif defined(CONFIG_CHIP_M32104)
+ LDIMM (r2, eit_vector) ; set EVB(cr5)
+ mvtc r2, cr5
+#endif
#endif /* CONFIG_MMU */
jmp r13
nop