This commit was manufactured by cvs2svn to create tag

[linux-2.6.git] / arch / m68knommu / platform / 5282 / pit.c

diff --git a/arch/m68knommu/platform/5307/pit.c b/arch/m68knommu/platform/5282/pit.c
similarity index 82%
rename from arch/m68knommu/platform/5307/pit.c
rename to arch/m68knommu/platform/5282/pit.c
index a9b2c2e..0ee25bf 100644 (file)
--- a/arch/m68knommu/platform/5307/pit.c
+++ b/arch/m68knommu/platform/5282/pit.c
@@ -3,10 +3,10 @@
 /*
  *     pit.c -- Motorola ColdFire PIT timer. Currently this type of
  *              hardware timer only exists in the Motorola ColdFire
- *              5270/5271 and 5282 CPUs.
+ *              5282 CPU.
  *
- *     Copyright (C) 1999-2004, Greg Ungerer (gerg@snapgear.com)
- *     Copyright (C) 2001-2004, SnapGear Inc. (www.snapgear.com)
+ *     Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com)
+ *     Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
  *
  */
 
@@ -42,15 +42,14 @@ void coldfire_pit_init(irqreturn_t (*handler)(int, void *, struct pt_regs *))
        volatile unsigned long *imrp;
        volatile struct mcfpit *tp;
 
-       request_irq(MCFINT_VECBASE + MCFINT_PIT1, handler, SA_INTERRUPT,
-               "ColdFire Timer", NULL);
+       request_irq(64+55, handler, SA_INTERRUPT, "ColdFire Timer", NULL);
 
        icrp = (volatile unsigned char *) (MCF_IPSBAR + MCFICM_INTC0 +
                MCFINTC_ICR0 + MCFINT_PIT1);
        *icrp = 0x2b; /* PIT1 with level 5, priority 3 */
 
        imrp = (volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
-       *imrp &= ~(1 << (MCFINT_PIT1 - 32));
+       *imrp &= ~(1 << (55 - 32));
 
        /* Set up PIT timer 1 as poll clock */
        tp = (volatile struct mcfpit *) (MCF_IPSBAR + MCFPIT_BASE1);
@@ -72,15 +71,15 @@ unsigned long coldfire_pit_offset(void)
        tp = (volatile struct mcfpit *) (MCF_IPSBAR + MCFPIT_BASE1);
        ipr = (volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IPRH);
 
-       pmr = *(&tp->pmr);
-       pcntr = *(&tp->pcntr);
+       pmr = tp->pmr;
+       pcntr = tp->pcntr;
 
        /*
         * If we are still in the first half of the upcount and a
         * timer interupt is pending, then add on a ticks worth of time.
         */
-       offset = ((pmr - pcntr) * (1000000 / HZ)) / pmr;
-       if ((offset < (1000000 / HZ / 2)) && (*ipr & (1 << (MCFINT_PIT1 - 32))))
+       offset = ((pcntr * (1000000 / HZ)) / pmr);
+       if ((offset < (1000000 / HZ / 2)) && (*ipr & (1 << (55 - 32))))
                offset += 1000000 / HZ;
        return offset;  
 }