linux 2.6.16.38 w/ vs2.0.3-rc1

[linux-2.6.git] / arch / mips / ddb5xxx / ddb5477 / irq.c

diff --git a/arch/mips/ddb5xxx/ddb5477/irq.c b/arch/mips/ddb5xxx/ddb5477/irq.c
index dfc2559..9ffe1a9 100644 (file)
--- a/arch/mips/ddb5xxx/ddb5477/irq.c
+++ b/arch/mips/ddb5xxx/ddb5477/irq.c
@@ -76,14 +76,11 @@ set_pci_int_attr(u32 pci, u32 intn, u32 active, u32 trigger)
 extern void vrc5477_irq_init(u32 base);
 extern void mips_cpu_irq_init(u32 base);
 extern asmlinkage void ddb5477_handle_int(void);
-extern int setup_irq(unsigned int irq, struct irqaction *irqaction);  
+extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
 static struct irqaction irq_cascade = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL };
 
-void
-ddb5477_irq_setup(void)
+void __init arch_init_irq(void)
 {
-       db_run(printk("ddb5477_irq_setup invoked.\n"));
-
        /* by default, we disable all interrupts and route all vrc5477
         * interrupts to pin 0 (irq 2) */
        ddb_out32(DDB_INTCTRL0, 0);
@@ -97,7 +94,7 @@ ddb5477_irq_setup(void)
        /* setup PCI interrupt attributes */
        set_pci_int_attr(PCI0, INTA, ACTIVE_LOW, LEVEL_SENSE);
        set_pci_int_attr(PCI0, INTB, ACTIVE_LOW, LEVEL_SENSE);
-       if (mips_machtype == MACH_NEC_ROCKHOPPERII) 
+       if (mips_machtype == MACH_NEC_ROCKHOPPERII)
                set_pci_int_attr(PCI0, INTC, ACTIVE_HIGH, LEVEL_SENSE);
        else
                set_pci_int_attr(PCI0, INTC, ACTIVE_LOW, LEVEL_SENSE);
@@ -137,7 +134,7 @@ ddb5477_irq_setup(void)
 
        /* setup cascade interrupts */
        setup_irq(VRC5477_IRQ_BASE + VRC5477_I8259_CASCADE, &irq_cascade);
-       setup_irq(CPU_IRQ_BASE + CPU_VRC5477_CASCADE, &irq_cascade);      
+       setup_irq(CPU_IRQ_BASE + CPU_VRC5477_CASCADE, &irq_cascade);
 
        /* hook up the first-level interrupt handler */
        set_except_vector(0, ddb5477_handle_int);