fedora core 6 1.2949 + vserver 2.2.0

[linux-2.6.git] / arch / mips / gt64120 / momenco_ocelot / setup.c

diff --git a/arch/mips/gt64120/momenco_ocelot/setup.c b/arch/mips/gt64120/momenco_ocelot/setup.c
index 58457bc..94f94eb 100644 (file)
--- a/arch/mips/gt64120/momenco_ocelot/setup.c
+++ b/arch/mips/gt64120/momenco_ocelot/setup.c
@@ -4,7 +4,7 @@
  * BRIEF MODULE DESCRIPTION
  * Momentum Computer Ocelot (CP7000) - board dependent boot routines
  *
- * Copyright (C) 1996, 1997, 2001  Ralf Baechle
+ * Copyright (C) 1996, 1997, 2001, 06  Ralf Baechle (ralf@linux-mips.org)
  * Copyright (C) 2000 RidgeRun, Inc.
  * Copyright (C) 2001 Red Hat, Inc.
  * Copyright (C) 2002 Momentum Computer
@@ -47,6 +47,8 @@
 #include <linux/pci.h>
 #include <linux/timex.h>
 #include <linux/vmalloc.h>
+#include <linux/pm.h>
+
 #include <asm/time.h>
 #include <asm/bootinfo.h>
 #include <asm/page.h>
@@ -54,7 +56,6 @@
 #include <asm/irq.h>
 #include <asm/pci.h>
 #include <asm/processor.h>
-#include <asm/ptrace.h>
 #include <asm/reboot.h>
 #include <asm/traps.h>
 #include <linux/bootmem.h>
@@ -69,7 +70,6 @@ extern void momenco_ocelot_restart(char *command);
 extern void momenco_ocelot_halt(void);
 extern void momenco_ocelot_power_off(void);
 
-extern void gt64120_time_init(void);
 extern void momenco_ocelot_irq_setup(void);
 
 static char reset_reason;
@@ -150,20 +150,18 @@ void PMON_v2_setup()
        gt64120_base = 0xe0000000;
 }
 
-static void __init momenco_ocelot_setup(void)
+void __init plat_mem_setup(void)
 {
        void (*l3func)(unsigned long)=KSEG1ADDR(&setup_l3cache);
        unsigned int tmpword;
 
-       board_time_init = gt64120_time_init;
-
        _machine_restart = momenco_ocelot_restart;
        _machine_halt = momenco_ocelot_halt;
-       _machine_power_off = momenco_ocelot_power_off;
+       pm_power_off = momenco_ocelot_power_off;
 
        /*
-        * initrd_start = (ulong)ocelot_initrd_start;
-        * initrd_end = (ulong)ocelot_initrd_start + (ulong)ocelot_initrd_size;
+        * initrd_start = (unsigned long)ocelot_initrd_start;
+        * initrd_end = (unsigned long)ocelot_initrd_start + (ulong)ocelot_initrd_size;
         * initrd_below_start_ok = 1;
         */
 
@@ -304,11 +302,9 @@ static void __init momenco_ocelot_setup(void)
        }
 
        /* Fix up the DiskOnChip mapping */
-       GT_WRITE(0x468, 0xfef73);
+       GT_WRITE(GT_DEV_B3_OFS, 0xfef73);
 }
 
-early_initcall(momenco_ocelot_setup);
-
 extern int rm7k_tcache_enabled;
 /*
  * This runs in KSEG1. See the verbiage in rm7k.c::probe_scache()
@@ -322,8 +318,8 @@ static void __init setup_l3cache(unsigned long size)
        printk("Enabling L3 cache...");
 
        /* Enable the L3 cache in the GT64120A's CPU Configuration register */
-       tmp =  GT_READ(0);
-       GT_WRITE(0, tmp | (1<<14));
+       tmp = GT_READ(GT_CPU_OFS);
+       GT_WRITE(GT_CPU_OFS, tmp | (1<<14));
 
        /* Enable the L3 cache in the CPU */
        set_c0_config(1<<12 /* CONF_TE */);