***********************************************************************
*/
-#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/kdev_t.h>
#include <linux/sched.h>
#include <linux/pci.h>
#include <linux/ide.h>
+#include <linux/irq.h>
#include <linux/ioport.h>
#include <linux/param.h> /* for HZ */
#include <linux/delay.h>
+#include <linux/pm.h>
+#ifdef CONFIG_SERIAL_TXX9
+#include <linux/tty.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+#endif
#include <asm/addrspace.h>
#include <asm/time.h>
#include <asm/mipsregs.h>
#include <asm/traps.h>
+extern void puts(unsigned char *cp);
+
/* Tick Timer divider */
#define JMR3927_TIMER_CCD 0 /* 1/2 */
#define JMR3927_TIMER_CLK (JMR3927_IMCLK / (2 << JMR3927_TIMER_CCD))
struct resource sio0;
struct resource sio1;
} jmr3927_resources = {
- { "RAM0", 0, 0x01FFFFFF, IORESOURCE_MEM },
- { "RAM1", 0x02000000, 0x03FFFFFF, IORESOURCE_MEM },
- { "PCIMEM", 0x08000000, 0x07FFFFFF, IORESOURCE_MEM },
- { "IOB", 0x10000000, 0x13FFFFFF },
- { "IOC", 0x14000000, 0x14FFFFFF },
- { "PCIIO", 0x15000000, 0x15FFFFFF },
- { "JMY1394", 0x1D000000, 0x1D3FFFFF },
- { "ROM1", 0x1E000000, 0x1E3FFFFF },
- { "ROM0", 0x1FC00000, 0x1FFFFFFF },
- { "SIO0", 0xFFFEF300, 0xFFFEF3FF },
- { "SIO1", 0xFFFEF400, 0xFFFEF4FF },
+ {
+ .start = 0,
+ .end = 0x01FFFFFF,
+ .name = "RAM0",
+ .flags = IORESOURCE_MEM
+ }, {
+ .start = 0x02000000,
+ .end = 0x03FFFFFF,
+ .name = "RAM1",
+ .flags = IORESOURCE_MEM
+ }, {
+ .start = 0x08000000,
+ .end = 0x07FFFFFF,
+ .name = "PCIMEM",
+ .flags = IORESOURCE_MEM
+ }, {
+ .start = 0x10000000,
+ .end = 0x13FFFFFF,
+ .name = "IOB"
+ }, {
+ .start = 0x14000000,
+ .end = 0x14FFFFFF,
+ .name = "IOC"
+ }, {
+ .start = 0x15000000,
+ .end = 0x15FFFFFF,
+ .name = "PCIIO"
+ }, {
+ .start = 0x1D000000,
+ .end = 0x1D3FFFFF,
+ .name = "JMY1394"
+ }, {
+ .start = 0x1E000000,
+ .end = 0x1E3FFFFF,
+ .name = "ROM1"
+ }, {
+ .start = 0x1FC00000,
+ .end = 0x1FFFFFFF,
+ .name = "ROM0"
+ }, {
+ .start = 0xFFFEF300,
+ .end = 0xFFFEF3FF,
+ .name = "SIO0"
+ }, {
+ .start = 0xFFFEF400,
+ .end = 0xFFFEF4FF,
+ .name = "SIO1"
+ },
};
/* don't enable - see errata */
while (1);
}
+static cycle_t jmr3927_hpt_read(void)
+{
+ /* We assume this function is called xtime_lock held. */
+ return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr;
+}
+
#define USE_RTC_DS1742
#ifdef USE_RTC_DS1742
extern void rtc_ds1742_init(unsigned long base);
#endif
static void __init jmr3927_time_init(void)
{
+ clocksource_mips.read = jmr3927_hpt_read;
+ mips_hpt_frequency = JMR3927_TIMER_CLK;
#ifdef USE_RTC_DS1742
if (jmr3927_have_nvram()) {
rtc_ds1742_init(JMR3927_IOC_NVRAMB_ADDR);
#endif
}
-unsigned long jmr3927_do_gettimeoffset(void);
-extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
-
-static void __init jmr3927_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
{
- do_gettimeoffset = jmr3927_do_gettimeoffset;
-
jmr3927_tmrptr->cpra = JMR3927_TIMER_CLK / HZ;
jmr3927_tmrptr->itmr = TXx927_TMTITMR_TIIE | TXx927_TMTITMR_TZCE;
jmr3927_tmrptr->ccdr = JMR3927_TIMER_CCD;
#define USECS_PER_JIFFY (1000000/HZ)
-unsigned long jmr3927_do_gettimeoffset(void)
-{
- unsigned long count;
- unsigned long res = 0;
-
- /* MUST read TRR before TISR. */
- count = jmr3927_tmrptr->trr;
-
- if (jmr3927_tmrptr->tisr & TXx927_TMTISR_TIIS) {
- /* timer interrupt is pending. use Max value. */
- res = USECS_PER_JIFFY - 1;
- } else {
- /* convert to usec */
- /* res = count / (JMR3927_TIMER_CLK / 1000000); */
- res = (count << 7) / ((JMR3927_TIMER_CLK << 7) / 1000000);
-
- /*
- * Due to possible jiffies inconsistencies, we need to check
- * the result so that we'll get a timer that is monotonic.
- */
- if (res >= USECS_PER_JIFFY)
- res = USECS_PER_JIFFY-1;
- }
-
- return res;
-}
-
-
//#undef DO_WRITE_THROUGH
#define DO_WRITE_THROUGH
#define DO_ENABLE_CACHE
extern struct resource pci_io_resource;
extern struct resource pci_mem_resource;
-static void __init jmr3927_setup(void)
+void __init plat_mem_setup(void)
{
char *argptr;
set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO);
board_time_init = jmr3927_time_init;
- board_timer_setup = jmr3927_timer_setup;
_machine_restart = jmr3927_machine_restart;
_machine_halt = jmr3927_machine_halt;
- _machine_power_off = jmr3927_machine_power_off;
+ pm_power_off = jmr3927_machine_power_off;
/*
* IO/MEM resources.
*/
ioport_resource.start = pci_io_resource.start;
ioport_resource.end = pci_io_resource.end;
- iomem_resource.start = pci_mem_resource.start;
- iomem_resource.end = pci_mem_resource.end;
+ iomem_resource.start = 0;
+ iomem_resource.end = 0xffffffff;
/* Reboot on panic */
panic_timeout = 180;
strcat(argptr, " ip=bootp");
}
-#ifdef CONFIG_TXX927_SERIAL_CONSOLE
+#ifdef CONFIG_SERIAL_TXX9
+ {
+ extern int early_serial_txx9_setup(struct uart_port *port);
+ int i;
+ struct uart_port req;
+ for(i = 0; i < 2; i++) {
+ memset(&req, 0, sizeof(req));
+ req.line = i;
+ req.iotype = UPIO_MEM;
+ req.membase = (char *)TX3927_SIO_REG(i);
+ req.mapbase = TX3927_SIO_REG(i);
+ req.irq = i == 0 ?
+ JMR3927_IRQ_IRC_SIO0 : JMR3927_IRQ_IRC_SIO1;
+ if (i == 0)
+ req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
+ req.uartclk = JMR3927_IMCLK;
+ early_serial_txx9_setup(&req);
+ }
+ }
+#ifdef CONFIG_SERIAL_TXX9_CONSOLE
argptr = prom_getcmdline();
if ((argptr = strstr(argptr, "console=")) == NULL) {
argptr = prom_getcmdline();
strcat(argptr, " console=ttyS1,115200");
}
#endif
+#endif
}
-early_initcall(jmr3927_setup);
-
-
static void tx3927_setup(void);
#ifdef CONFIG_PCI
jmr3927_io_dipsw());
}
-static void __init tx3927_setup(void)
+void __init tx3927_setup(void)
{
int i;
git://git.onelab.eu / linux-2.6.git / blobdiff