* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
+#include <linux/config.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/ptrace.h>
isa = (config0 & MIPS_CONF_AT) >> 13;
switch (isa) {
case 0:
- switch ((config0 & MIPS_CONF_AR) >> 10) {
+ switch ((config0 >> 10) & 7) {
case 0:
c->isa_level = MIPS_CPU_ISA_M32R1;
break;
}
break;
case 2:
- switch ((config0 & MIPS_CONF_AR) >> 10) {
+ switch ((config0 >> 10) & 7) {
case 0:
c->isa_level = MIPS_CPU_ISA_M64R1;
break;
return config3 & MIPS_CONF_M;
}
-static void __init decode_configs(struct cpuinfo_mips *c)
+static inline void decode_configs(struct cpuinfo_mips *c)
{
/* MIPS32 or MIPS64 compliant CPU. */
c->options = MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER |
break;
case PRID_IMP_25KF:
c->cputype = CPU_25KF;
+ /* Probe for L2 cache */
+ c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
break;
case PRID_IMP_34K:
c->cputype = CPU_34K;