#include <asm/cachectl.h>
#include <asm/fpregdef.h>
#include <asm/mipsregs.h>
-#include <asm/offset.h>
+#include <asm/asm-offsets.h>
#include <asm/page.h>
#include <asm/pgtable-bits.h>
#include <asm/regdef.h>
/*
* FPU context is saved iff the process has used it's FPU in the current
* time slice as indicated by _TIF_USEDFPU. In any case, the CU1 bit for user
- * space STATUS register should be 0, so that a process *always* starts its
+ * space STATUS register should be 0, so that a process *always* starts its
* userland with FPU disabled after each context switch.
*
* FPU will be enabled as soon as the process accesses FPU again, through
and t0, t0, t1
LONG_S t0, ST_OFF(t3)
-#ifdef CONFIG_MIPS32
- fpu_save_double a0 t0 # clobbers t0
-#endif
-#ifdef CONFIG_MIPS64
- sll t2, t0, 5
- bgez t2, 2f
- sdc1 $f0, (THREAD_FPU + 0x00)(a0)
- fpu_save_16odd a0
-2:
- fpu_save_16even a0 t1 # clobbers t1
-#endif
+ fpu_save_double a0 t1 t0 t2 # c0_status passed in t1
+ # clobbers t0 and t2
1:
/*
* Save a thread's fp context.
*/
LEAF(_save_fp)
-#ifdef CONFIG_MIPS32
- fpu_save_double a0 t1 # clobbers t1
-#endif
-#ifdef CONFIG_MIPS64
- mfc0 t0, CP0_STATUS
- sll t1, t0, 5
- bgez t1, 1f # 16 register mode?
- fpu_save_16odd a0
-1:
- fpu_save_16even a0 t1 # clobbers t1
- sdc1 $f0, (THREAD_FPU + 0x00)(a0)
+#ifdef CONFIG_64BIT
+ mfc0 t1, CP0_STATUS
#endif
+ fpu_save_double a0 t1 t0 t2 # clobbers t1
jr ra
END(_save_fp)
* Restore a thread's fp context.
*/
LEAF(_restore_fp)
-#ifdef CONFIG_MIPS32
fpu_restore_double a0, t1 # clobbers t1
-#endif
-#ifdef CONFIG_MIPS64
- mfc0 t0, CP0_STATUS
- sll t1, t0, 5
- bgez t1, 1f # 16 register mode?
-
- fpu_restore_16odd a0
-1: fpu_restore_16even a0, t0 # clobbers t0
- ldc1 $f0, (THREAD_FPU + 0x00)(a0)
-#endif
-
jr ra
END(_restore_fp)
li t1, -1 # SNaN
-#ifdef CONFIG_MIPS64
+#ifdef CONFIG_64BIT
sll t0, t0, 5
bgez t0, 1f # 16 / 32 register mode?
dmtc1 t1, $f31
1:
#endif
-
+
#ifdef CONFIG_CPU_MIPS32
mtc1 t1, $f0
mtc1 t1, $f1