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[linux-2.6.git] / arch / mips / mm / tlb-sb1.c

diff --git a/arch/mips/mm/tlb-sb1.c b/arch/mips/mm/tlb-sb1.c
index fb315e2..33c177e 100644 (file)
--- a/arch/mips/mm/tlb-sb1.c
+++ b/arch/mips/mm/tlb-sb1.c
@@ -23,7 +23,14 @@
 #include <asm/bootinfo.h>
 #include <asm/cpu.h>
 
-extern void build_tlb_refill_handler(void);
+#ifdef CONFIG_MIPS32
+extern void except_vec0_sb1(void);
+extern void except_vec1_generic(void);
+#endif
+#ifdef CONFIG_MIPS64
+extern void except_vec0_generic(void);
+extern void except_vec1_sb1(void);
+#endif
 
 #define UNIQUE_ENTRYHI(idx) (KSEG0 + ((idx) << (PAGE_SHIFT + 1)))
 
@@ -279,17 +286,10 @@ void local_flush_tlb_one(unsigned long page)
    these entries, we just bump the asid. */
 void local_flush_tlb_mm(struct mm_struct *mm)
 {
-       int cpu;
-
-       preempt_disable();
-
-       cpu = smp_processor_id();
-
+       int cpu = smp_processor_id();
        if (cpu_context(cpu, mm) != 0) {
                drop_mmu_context(mm, cpu);
        }
-
-       preempt_enable();
 }
 
 /* Stolen from mips32 routines */
@@ -373,5 +373,14 @@ void tlb_init(void)
         */
        sb1_sanitize_tlb();
 
-       build_tlb_refill_handler();
+#ifdef CONFIG_MIPS32
+       memcpy((void *)KSEG0, &except_vec0_sb1, 0x80);
+       memcpy((void *)(KSEG0 + 0x080), &except_vec1_generic, 0x80);
+       flush_icache_range(KSEG0, KSEG0 + 0x100);
+#endif
+#ifdef CONFIG_MIPS64
+       memcpy((void *)CKSEG0, &except_vec0_generic, 0x80);
+       memcpy((void *)(CKSEG0 + 0x80), &except_vec1_sb1, 0x80);
+       flush_icache_range(CKSEG0, CKSEG0 + 0x100);
+#endif
 }