#include <asm/bootinfo.h>
#include <asm/cpu.h>
-#ifdef CONFIG_MIPS32
-extern void except_vec0_sb1(void);
-extern void except_vec1_generic(void);
-#endif
-#ifdef CONFIG_MIPS64
-extern void except_vec0_generic(void);
-extern void except_vec1_sb1(void);
-#endif
+extern void build_tlb_refill_handler(void);
#define UNIQUE_ENTRYHI(idx) (KSEG0 + ((idx) << (PAGE_SHIFT + 1)))
* with the firmware, go back and give all the entries invalid addresses with
* the normal flush routine. Wired entries will be killed as well!
*/
-void sb1_sanitize_tlb(void)
+static void __init sb1_sanitize_tlb(void)
{
int entry;
long addr = 0;
these entries, we just bump the asid. */
void local_flush_tlb_mm(struct mm_struct *mm)
{
- int cpu = smp_processor_id();
+ int cpu;
+
+ preempt_disable();
+
+ cpu = smp_processor_id();
+
if (cpu_context(cpu, mm) != 0) {
drop_mmu_context(mm, cpu);
}
+
+ preempt_enable();
}
/* Stolen from mips32 routines */
*/
sb1_sanitize_tlb();
-#ifdef CONFIG_MIPS32
- memcpy((void *)KSEG0, &except_vec0_sb1, 0x80);
- memcpy((void *)(KSEG0 + 0x080), &except_vec1_generic, 0x80);
- flush_icache_range(KSEG0, KSEG0 + 0x100);
-#endif
-#ifdef CONFIG_MIPS64
- memcpy((void *)CKSEG0, &except_vec0_generic, 0x80);
- memcpy((void *)(CKSEG0 + 0x80), &except_vec1_sb1, 0x80);
- flush_icache_range(CKSEG0, CKSEG0 + 0x100);
-#endif
+ build_tlb_refill_handler();
}