fedora core 6 1.2949 + vserver 2.2.0

[linux-2.6.git] / arch / mips / pci / ops-gt64111.c

diff --git a/arch/mips/pci/ops-gt64111.c b/arch/mips/pci/ops-gt64111.c
index c5b0fc1..ecd3991 100644 (file)
--- a/arch/mips/pci/ops-gt64111.c
+++ b/arch/mips/pci/ops-gt64111.c
@@ -15,18 +15,18 @@
 #include <asm/io.h>
 #include <asm/gt64120.h>
 
-#include <asm/cobalt/cobalt.h>
+#include <asm/mach-cobalt/cobalt.h>
 
 /*
- * Accessing device 31 hangs the GT64120.  Not sure if this will also hang
- * the GT64111, let's be paranoid for now.
+ * Device 31 on the GT64111 is used to generate PCI special
+ * cycles, so we shouldn't expected to find a device there ...
  */
 static inline int pci_range_ck(struct pci_bus *bus, unsigned int devfn)
 {
-       if (bus->number == 0 && devfn == PCI_DEVFN(31, 0))
-               return -1;
+       if (bus->number == 0 && PCI_SLOT(devfn) < 31)
+               return 0;
 
-       return 0;
+       return -1;
 }
 
 static int gt64111_pci_read_config(struct pci_bus *bus, unsigned int devfn,
@@ -38,18 +38,18 @@ static int gt64111_pci_read_config(struct pci_bus *bus, unsigned int devfn,
        switch (size) {
        case 4:
                PCI_CFG_SET(devfn, where);
-               *val = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
+               *val = GT_READ(GT_PCI0_CFGDATA_OFS);
                return PCIBIOS_SUCCESSFUL;
 
        case 2:
                PCI_CFG_SET(devfn, (where & ~0x3));
-               *val = GALILEO_INL(GT_PCI0_CFGDATA_OFS)
+               *val = GT_READ(GT_PCI0_CFGDATA_OFS)
                    >> ((where & 3) * 8);
                return PCIBIOS_SUCCESSFUL;
 
        case 1:
                PCI_CFG_SET(devfn, (where & ~0x3));
-               *val = GALILEO_INL(GT_PCI0_CFGDATA_OFS)
+               *val = GT_READ(GT_PCI0_CFGDATA_OFS)
                    >> ((where & 3) * 8);
                return PCIBIOS_SUCCESSFUL;
        }
@@ -68,25 +68,25 @@ static int gt64111_pci_write_config(struct pci_bus *bus, unsigned int devfn,
        switch (size) {
        case 4:
                PCI_CFG_SET(devfn, where);
-               GALILEO_OUTL(val, GT_PCI0_CFGDATA_OFS);
+               GT_WRITE(GT_PCI0_CFGDATA_OFS, val);
 
                return PCIBIOS_SUCCESSFUL;
 
        case 2:
                PCI_CFG_SET(devfn, (where & ~0x3));
-               tmp = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
+               tmp = GT_READ(GT_PCI0_CFGDATA_OFS);
                tmp &= ~(0xffff << ((where & 0x3) * 8));
                tmp |= (val << ((where & 0x3) * 8));
-               GALILEO_OUTL(tmp, GT_PCI0_CFGDATA_OFS);
+               GT_WRITE(GT_PCI0_CFGDATA_OFS, tmp);
 
                return PCIBIOS_SUCCESSFUL;
 
        case 1:
                PCI_CFG_SET(devfn, (where & ~0x3));
-               tmp = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
+               tmp = GT_READ(GT_PCI0_CFGDATA_OFS);
                tmp &= ~(0xff << ((where & 0x3) * 8));
                tmp |= (val << ((where & 0x3) * 8));
-               GALILEO_OUTL(tmp, GT_PCI0_CFGDATA_OFS);
+               GT_WRITE(GT_PCI0_CFGDATA_OFS, tmp);
 
                return PCIBIOS_SUCCESSFUL;
        }