fedora core 6 1.2949 + vserver 2.2.0

[linux-2.6.git] / arch / mips / sgi-ip32 / ip32-setup.c

diff --git a/arch/mips/sgi-ip32/ip32-setup.c b/arch/mips/sgi-ip32/ip32-setup.c
index 8d270be..57708fe 100644 (file)
--- a/arch/mips/sgi-ip32/ip32-setup.c
+++ b/arch/mips/sgi-ip32/ip32-setup.c
@@ -7,8 +7,8 @@
  *
  * Copyright (C) 2000 Harald Koerfgen
  * Copyright (C) 2002, 2003, 2005 Ilya A. Volynets
+ * Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org>
  */
-#include <linux/config.h>
 #include <linux/console.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
@@ -66,11 +66,6 @@ static inline void str2eaddr(unsigned char *ea, unsigned char *str)
 #include <linux/tty.h>
 #include <linux/serial.h>
 #include <linux/serial_core.h>
-extern int early_serial_setup(struct uart_port *port);
-
-#define STD_COM_FLAGS (ASYNC_SKIP_TEST)
-#define BASE_BAUD (1843200 / 16)
-
 #endif /* CONFIG_SERIAL_8250 */
 
 /* An arbitrary time; this can be decreased if reliability looks good */
@@ -86,32 +81,31 @@ void __init ip32_time_init(void)
        printk("%d MHz CPU detected\n", mips_hpt_frequency * 2 / 1000000);
 }
 
-void __init ip32_timer_setup(struct irqaction *irq)
+void __init plat_timer_setup(struct irqaction *irq)
 {
        irq->handler = no_action;
        setup_irq(IP32_R4K_TIMER_IRQ, irq);
 }
 
-static int __init ip32_setup(void)
+void __init plat_mem_setup(void)
 {
        board_be_init = ip32_be_init;
 
-       rtc_get_time = mc146818_get_cmos_time;
-       rtc_set_mmss = mc146818_set_rtc_mmss;
+       rtc_mips_get_time = mc146818_get_cmos_time;
+       rtc_mips_set_mmss = mc146818_set_rtc_mmss;
 
        board_time_init = ip32_time_init;
-       board_timer_setup = ip32_timer_setup;
 
 #ifdef CONFIG_SERIAL_8250
-       {
+       {
                static struct uart_port o2_serial[2];
 
                memset(o2_serial, 0, sizeof(o2_serial));
                o2_serial[0].type       = PORT_16550A;
                o2_serial[0].line       = 0;
                o2_serial[0].irq        = MACEISA_SERIAL1_IRQ;
-               o2_serial[0].flags      = STD_COM_FLAGS;
-               o2_serial[0].uartclk    = BASE_BAUD * 16;
+               o2_serial[0].flags      = UPF_SKIP_TEST;
+               o2_serial[0].uartclk    = 1843200;
                o2_serial[0].iotype     = UPIO_MEM;
                o2_serial[0].membase    = (char *)&mace->isa.serial1;
                o2_serial[0].fifosize   = 14;
@@ -121,8 +115,8 @@ static int __init ip32_setup(void)
                o2_serial[1].type       = PORT_16550A;
                o2_serial[1].line       = 1;
                o2_serial[1].irq        = MACEISA_SERIAL2_IRQ;
-               o2_serial[1].flags      = STD_COM_FLAGS;
-               o2_serial[1].uartclk    = BASE_BAUD * 16;
+               o2_serial[1].flags      = UPF_SKIP_TEST;
+               o2_serial[1].uartclk    = 1843200;
                o2_serial[1].iotype     = UPIO_MEM;
                o2_serial[1].membase    = (char *)&mace->isa.serial2;
                o2_serial[1].fifosize   = 14;
@@ -152,8 +146,4 @@ static int __init ip32_setup(void)
                }
        }
 #endif
-
-       return 0;
 }
-
-early_initcall(ip32_setup);