* on every box.
*/
-#include <linux/config.h>
+#include <linux/capability.h>
#include <linux/init.h>
#include <linux/proc_fs.h>
#include <linux/miscdevice.h>
uint8_t write_control;
};
-static int perf_processor_interface = UNKNOWN_INTF;
-static int perf_enabled = 0;
+static int perf_processor_interface __read_mostly = UNKNOWN_INTF;
+static int perf_enabled __read_mostly;
static spinlock_t perf_lock;
-struct parisc_device *cpu_device = NULL;
+struct parisc_device *cpu_device __read_mostly;
/* RDRs to write for PCX-W */
-static int perf_rdrs_W[] =
+static const int perf_rdrs_W[] =
{ 0, 1, 4, 5, 6, 15, 16, 17, 18, 20, 21, 22, 23, 24, 25, -1 };
/* RDRs to write for PCX-U */
-static int perf_rdrs_U[] =
+static const int perf_rdrs_U[] =
{ 0, 1, 4, 5, 6, 7, 16, 17, 18, 20, 21, 22, 23, 24, 25, -1 };
/* RDR register descriptions for PCX-W */
-static struct rdr_tbl_ent perf_rdr_tbl_W[] = {
+static const struct rdr_tbl_ent perf_rdr_tbl_W[] = {
{ 19, 1, 8 }, /* RDR 0 */
{ 16, 1, 16 }, /* RDR 1 */
{ 72, 2, 0 }, /* RDR 2 */
};
/* RDR register descriptions for PCX-U */
-static struct rdr_tbl_ent perf_rdr_tbl_U[] = {
+static const struct rdr_tbl_ent perf_rdr_tbl_U[] = {
{ 19, 1, 8 }, /* RDR 0 */
{ 32, 1, 16 }, /* RDR 1 */
{ 20, 1, 0 }, /* RDR 2 */
* A non-zero write_control in the above tables is a byte offset into
* this array.
*/
-static uint64_t perf_bitmasks[] = {
- 0x0000000000000000, /* first dbl word must be zero */
- 0xfdffe00000000000, /* RDR0 bitmask */
- 0x003f000000000000, /* RDR1 bitmask */
- 0x00ffffffffffffff, /* RDR20-RDR21 bitmask (152 bits) */
- 0xffffffffffffffff,
- 0xfffffffc00000000,
- 0xffffffffffffffff, /* RDR22-RDR23 bitmask (233 bits) */
- 0xffffffffffffffff,
- 0xfffffffffffffffc,
- 0xff00000000000000
+static const uint64_t perf_bitmasks[] = {
+ 0x0000000000000000ul, /* first dbl word must be zero */
+ 0xfdffe00000000000ul, /* RDR0 bitmask */
+ 0x003f000000000000ul, /* RDR1 bitmask */
+ 0x00fffffffffffffful, /* RDR20-RDR21 bitmask (152 bits) */
+ 0xfffffffffffffffful,
+ 0xfffffffc00000000ul,
+ 0xfffffffffffffffful, /* RDR22-RDR23 bitmask (233 bits) */
+ 0xfffffffffffffffful,
+ 0xfffffffffffffffcul,
+ 0xff00000000000000ul
};
/*
* Write control bitmasks for Pa-8700 processor given
* somethings have changed slightly.
*/
-static uint64_t perf_bitmasks_piranha[] = {
- 0x0000000000000000, /* first dbl word must be zero */
- 0xfdffe00000000000, /* RDR0 bitmask */
- 0x003f000000000000, /* RDR1 bitmask */
- 0x00ffffffffffffff, /* RDR20-RDR21 bitmask (158 bits) */
- 0xffffffffffffffff,
- 0xfffffffc00000000,
- 0xffffffffffffffff, /* RDR22-RDR23 bitmask (210 bits) */
- 0xffffffffffffffff,
- 0xffffffffffffffff,
- 0xfffc000000000000
+static const uint64_t perf_bitmasks_piranha[] = {
+ 0x0000000000000000ul, /* first dbl word must be zero */
+ 0xfdffe00000000000ul, /* RDR0 bitmask */
+ 0x003f000000000000ul, /* RDR1 bitmask */
+ 0x00fffffffffffffful, /* RDR20-RDR21 bitmask (158 bits) */
+ 0xfffffffffffffffful,
+ 0xfffffffc00000000ul,
+ 0xfffffffffffffffful, /* RDR22-RDR23 bitmask (210 bits) */
+ 0xfffffffffffffffful,
+ 0xfffffffffffffffful,
+ 0xfffc000000000000ul
};
-static uint64_t *bitmask_array; /* array of bitmasks to use */
+static const uint64_t *bitmask_array; /* array of bitmasks to use */
/******************************************************************************
* Function Prototypes
static int perf_config(uint32_t *image_ptr);
static int perf_release(struct inode *inode, struct file *file);
static int perf_open(struct inode *inode, struct file *file);
-static ssize_t perf_read(struct file *file, char *buf, size_t cnt, loff_t *ppos);
-static ssize_t perf_write(struct file *file, const char *buf, size_t count,
+static ssize_t perf_read(struct file *file, char __user *buf, size_t cnt, loff_t *ppos);
+static ssize_t perf_write(struct file *file, const char __user *buf, size_t count,
loff_t *ppos);
-static int perf_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
- unsigned long arg);
+static long perf_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
static void perf_start_counters(void);
static int perf_stop_counters(uint32_t *raddr);
-static struct rdr_tbl_ent * perf_rdr_get_entry(uint32_t rdr_num);
+static const struct rdr_tbl_ent * perf_rdr_get_entry(uint32_t rdr_num);
static int perf_rdr_read_ubuf(uint32_t rdr_num, uint64_t *buffer);
static int perf_rdr_clear(uint32_t rdr_num);
static int perf_write_image(uint64_t *memaddr);
/*
* Read does nothing for this driver
*/
-static ssize_t perf_read(struct file *file, char *buf, size_t cnt, loff_t *ppos)
+static ssize_t perf_read(struct file *file, char __user *buf, size_t cnt, loff_t *ppos)
{
return 0;
}
* called on the processor that the download should happen
* on.
*/
-static ssize_t perf_write(struct file *file, const char *buf, size_t count,
+static ssize_t perf_write(struct file *file, const char __user *buf, size_t count,
loff_t *ppos)
{
int err;
* must be running on the processor that you wish to change.
*/
-static int perf_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
- unsigned long arg)
+static long perf_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
long error_start;
- uint32_t raddr[4];
+ uint32_t raddr[4];
+ int error = 0;
switch (cmd) {
case PA_PERF_ON:
/* Start the counters */
perf_start_counters();
- return 0;
+ break;
case PA_PERF_OFF:
error_start = perf_stop_counters(raddr);
if (error_start != 0) {
printk(KERN_ERR "perf_off: perf_stop_counters = %ld\n", error_start);
- return -EFAULT;
+ error = -EFAULT;
+ break;
}
/* copy out the Counters */
- if (copy_to_user((void *)arg, raddr,
+ if (copy_to_user((void __user *)arg, raddr,
sizeof (raddr)) != 0) {
- return -EFAULT;
+ error = -EFAULT;
+ break;
}
- return 0;
+ break;
case PA_PERF_VERSION:
/* Return the version # */
- return put_user(PERF_VERSION, (int *)arg);
+ error = put_user(PERF_VERSION, (int *)arg);
+ break;
default:
- break;
+ error = -ENOTTY;
}
- return -ENOTTY;
+
+ return error;
}
static struct file_operations perf_fops = {
.llseek = no_llseek,
.read = perf_read,
.write = perf_write,
- .ioctl = perf_ioctl,
+ .unlocked_ioctl = perf_ioctl,
+ .compat_ioctl = perf_ioctl,
.open = perf_open,
.release = perf_release
};
perf_processor_interface = ONYX_INTF;
} else if (boot_cpu_data.cpu_type == pcxw ||
boot_cpu_data.cpu_type == pcxw_ ||
- boot_cpu_data.cpu_type == pcxw2) {
+ boot_cpu_data.cpu_type == pcxw2 ||
+ boot_cpu_data.cpu_type == mako) {
perf_processor_interface = CUDA_INTF;
- if (boot_cpu_data.cpu_type == pcxw2)
+ if (boot_cpu_data.cpu_type == pcxw2 ||
+ boot_cpu_data.cpu_type == mako)
bitmask_array = perf_bitmasks_piranha;
} else {
perf_processor_interface = UNKNOWN_INTF;
* all of dword 22 and 58 bits (plus 6 don't care bits) of
* dword 23.
*/
- userbuf[21] &= 0xfffffffffffffc00; /* 0 to last 10 bits */
+ userbuf[21] &= 0xfffffffffffffc00ul; /* 0 to last 10 bits */
userbuf[22] = 0;
userbuf[23] = 0;
* Retrieve a pointer to the description of what this
* RDR contains.
*/
-static struct rdr_tbl_ent * perf_rdr_get_entry(uint32_t rdr_num)
+static const struct rdr_tbl_ent * perf_rdr_get_entry(uint32_t rdr_num)
{
if (perf_processor_interface == ONYX_INTF) {
return &perf_rdr_tbl_U[rdr_num];
{
uint64_t data, data_mask = 0;
uint32_t width, xbits, i;
- struct rdr_tbl_ent *tentry;
+ const struct rdr_tbl_ent *tentry;
tentry = perf_rdr_get_entry(rdr_num);
if ((width = tentry->width) == 0)
*/
static int perf_rdr_clear(uint32_t rdr_num)
{
- struct rdr_tbl_ent *tentry;
+ const struct rdr_tbl_ent *tentry;
int32_t i;
tentry = perf_rdr_get_entry(rdr_num);
uint64_t buffer[MAX_RDR_WORDS];
uint64_t *bptr;
uint32_t dwords;
- uint32_t *intrigue_rdr;
- uint64_t *intrigue_bitmask, tmp64, proc_hpa;
- struct rdr_tbl_ent *tentry;
+ const uint32_t *intrigue_rdr;
+ const uint64_t *intrigue_bitmask;
+ uint64_t tmp64;
+ void __iomem *runway;
+ const struct rdr_tbl_ent *tentry;
int i;
/* Clear out counters */
return -1;
}
- proc_hpa = cpu_device->hpa;
+ runway = ioremap_nocache(cpu_device->hpa.start, 4096);
/* Merge intrigue bits into Runway STATUS 0 */
- tmp64 = __raw_readq(proc_hpa + RUNWAY_STATUS) & 0xffecffffffffffff;
- __raw_writeq(tmp64 | (*memaddr++ & 0x0013000000000000), proc_hpa + RUNWAY_STATUS);
+ tmp64 = __raw_readq(runway + RUNWAY_STATUS) & 0xffecfffffffffffful;
+ __raw_writeq(tmp64 | (*memaddr++ & 0x0013000000000000ul),
+ runway + RUNWAY_STATUS);
/* Write RUNWAY DEBUG registers */
for (i = 0; i < 8; i++) {
- __raw_writeq(*memaddr++, proc_hpa + RUNWAY_DEBUG + i);
+ __raw_writeq(*memaddr++, runway + RUNWAY_DEBUG);
}
return 0;
*/
static void perf_rdr_write(uint32_t rdr_num, uint64_t *buffer)
{
- struct rdr_tbl_ent *tentry;
+ const struct rdr_tbl_ent *tentry;
int32_t i;
printk("perf_rdr_write\n");