This commit was manufactured by cvs2svn to create tag

[linux-2.6.git] / arch / ppc / kernel / cputable.c

diff --git a/arch/ppc/kernel/cputable.c b/arch/ppc/kernel/cputable.c
index b48744b..4f560f5 100644 (file)
--- a/arch/ppc/kernel/cputable.c
+++ b/arch/ppc/kernel/cputable.c
@@ -34,7 +34,8 @@ extern void __setup_cpu_8xx(unsigned long offset, int cpu_nr, struct cpu_spec* s
 extern void __setup_cpu_generic(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
 
 #define CLASSIC_PPC (!defined(CONFIG_8xx) && !defined(CONFIG_4xx) && \
-                    !defined(CONFIG_POWER3) && !defined(CONFIG_POWER4))
+                    !defined(CONFIG_POWER3) && !defined(CONFIG_POWER4) && \
+                    !defined(CONFIG_BOOKE))
 
 /* This table only contains "desktop" CPUs, it need to be filled with embedded
  * ones as well...
@@ -209,7 +210,15 @@ struct cpu_spec    cpu_specs[] = {
        32, 32,
        __setup_cpu_750fx
     },
-
+    {  /* 750GX */
+       0xffff0000, 0x70020000, "750GX",
+       CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
+       CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_CAN_NAP |
+       CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS,
+       COMMON_PPC,
+       32, 32,
+       __setup_cpu_750fx
+    },
     {  /* 740/750 (L2CR bit need fixup for 740) */
        0xffff0000, 0x00080000, "740/750",
        CPU_FTR_COMMON |
@@ -342,6 +351,14 @@ struct cpu_spec    cpu_specs[] = {
        32, 32,
        __setup_cpu_603
     },
+    {  /* 8280 is a G2_LE (603e core, plus some) */
+       0x7fff0000, 0x00820000, "8280",
+       CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
+       CPU_FTR_CAN_NAP | CPU_FTR_HAS_HIGH_BATS,
+       COMMON_PPC,
+       32, 32,
+       __setup_cpu_603
+    },
     {  /* default match, we assume split I/D cache & TB (non-601)... */
        0x00000000, 0x00000000, "(generic PPC)",
        CPU_FTR_COMMON |
@@ -537,14 +554,24 @@ struct cpu_spec   cpu_specs[] = {
         32, 32,
         0, /*__setup_cpu_440 */
     },
-    { /* 440GX Rev. B1 (2.1) */
-        0xf0000fff, 0x50000852, "440GX Rev. B1 (2.1)",
+    { /* 440GX Rev. C */
+        0xf0000fff, 0x50000892, "440GX Rev. C",
         CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
         PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
         32, 32,
         0, /*__setup_cpu_440 */
     },
 #endif /* CONFIG_44x */
+#ifdef CONFIG_E500
+    { /* e500 */
+        0xffff0000, 0x80200000, "e500",
+       /* xxx - galak: add CPU_FTR_CAN_DOZE */
+        CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB,
+        PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
+        32, 32,
+        0, /*__setup_cpu_e500 */
+    },
+#endif
 #if !CLASSIC_PPC
     {  /* default match */
        0x00000000, 0x00000000, "(generic PPC)",