vserver 1.9.3

[linux-2.6.git] / arch / ppc / kernel / head.S

diff --git a/arch/ppc/kernel/head.S b/arch/ppc/kernel/head.S
index 54f7728..3a3e3c7 100644 (file)
--- a/arch/ppc/kernel/head.S
+++ b/arch/ppc/kernel/head.S
@@ -412,9 +412,7 @@ DataAccess:
 1:     stw     r10,_DSISR(r11)
        mr      r5,r10
        mfspr   r4,DAR
-       stw     r4,_DAR(r11)
-       addi    r3,r1,STACK_FRAME_OVERHEAD
-       EXC_XFER_EE_LITE(0x300, do_page_fault)
+       EXC_XFER_EE_LITE(0x300, handle_page_fault)
 
 #ifdef CONFIG_PPC64BRIDGE
 /* SLB fault on data access. */
@@ -436,10 +434,9 @@ InstructionAccess:
        li      r3,0                    /* into the hash table */
        mr      r4,r12                  /* SRR0 is fault address */
        bl      hash_page
-1:     addi    r3,r1,STACK_FRAME_OVERHEAD
-       mr      r4,r12
+1:     mr      r4,r12
        mr      r5,r9
-       EXC_XFER_EE_LITE(0x400, do_page_fault)
+       EXC_XFER_EE_LITE(0x400, handle_page_fault)
 
 #ifdef CONFIG_PPC64BRIDGE
 /* SLB fault on instruction access. */
@@ -491,14 +488,16 @@ SystemCall:
 /*
  * The Altivec unavailable trap is at 0x0f20.  Foo.
  * We effectively remap it to 0x3000.
+ * We include an altivec unavailable exception vector even if
+ * not configured for Altivec, so that you can't panic a
+ * non-altivec kernel running on a machine with altivec just
+ * by executing an altivec instruction.
  */
        . = 0xf00
        b       Trap_0f
 
        . = 0xf20
-#ifdef CONFIG_ALTIVEC
        b       AltiVecUnavailable
-#endif
 
 Trap_0f:
        EXCEPTION_PROLOG
@@ -553,7 +552,7 @@ InstructionTLBMiss:
        rlwimi  r3,r3,32-1,31,31        /* _PAGE_USER -> PP lsb */
        ori     r1,r1,0xe14             /* clear out reserved bits and M */
        andc    r1,r3,r1                /* PP = user? (rw&dirty? 2: 3): 0 */
-       mtspr   RPA,r1
+       mtspr   SPRN_RPA,r1
        mfspr   r3,IMISS
        tlbli   r3
        mfspr   r3,SRR1         /* Need to restore CR0 */
@@ -627,7 +626,7 @@ DataLoadTLBMiss:
        rlwimi  r3,r3,32-1,31,31        /* _PAGE_USER -> PP lsb */
        ori     r1,r1,0xe14             /* clear out reserved bits and M */
        andc    r1,r3,r1                /* PP = user? (rw&dirty? 2: 3): 0 */
-       mtspr   RPA,r1
+       mtspr   SPRN_RPA,r1
        mfspr   r3,DMISS
        tlbld   r3
        mfspr   r3,SRR1         /* Need to restore CR0 */
@@ -695,7 +694,7 @@ DataStoreTLBMiss:
        rlwimi  r3,r3,32-1,30,30        /* _PAGE_USER -> PP msb */
        li      r1,0xe15                /* clear out reserved bits and M */
        andc    r1,r3,r1                /* PP = user? 2: 0 */
-       mtspr   RPA,r1
+       mtspr   SPRN_RPA,r1
        mfspr   r3,DMISS
        tlbld   r3
        mfspr   r3,SRR1         /* Need to restore CR0 */
@@ -705,6 +704,7 @@ DataStoreTLBMiss:
 #ifndef CONFIG_ALTIVEC
 #define AltivecAssistException UnknownException
 #endif
+
        EXCEPTION(0x1300, Trap_13, InstructionBreakpoint, EXC_XFER_EE)
        EXCEPTION(0x1400, SMI, SMIException, EXC_XFER_EE)
        EXCEPTION(0x1500, Trap_15, UnknownException, EXC_XFER_EE)
@@ -746,12 +746,12 @@ DataStoreTLBMiss:
 
        . = 0x3000
 
-#ifdef CONFIG_ALTIVEC
 AltiVecUnavailable:
        EXCEPTION_PROLOG
+#ifdef CONFIG_ALTIVEC
        bne     load_up_altivec         /* if from user, just load it up */
-       EXC_XFER_EE_LITE(0xf20, KernelAltiVec)
 #endif /* CONFIG_ALTIVEC */
+       EXC_XFER_EE_LITE(0xf20, AltivecUnavailException)
 
 #ifdef CONFIG_PPC64BRIDGE
 DataAccess:
@@ -800,7 +800,7 @@ load_up_fpu:
        tophys(r6,0)                    /* get __pa constant */
        addis   r3,r6,last_task_used_math@ha
        lwz     r4,last_task_used_math@l(r3)
-       cmpi    0,r4,0
+       cmpwi   0,r4,0
        beq     1f
        add     r4,r4,r6
        addi    r4,r4,THREAD            /* want last_task_used_math->thread */
@@ -927,7 +927,7 @@ load_up_altivec:
        tophys(r6,0)
        addis   r3,r6,last_task_used_altivec@ha
        lwz     r4,last_task_used_altivec@l(r3)
-       cmpi    0,r4,0
+       cmpwi   0,r4,0
        beq     1f
        add     r4,r4,r6
        addi    r4,r4,THREAD    /* want THREAD of last_task_used_altivec */
@@ -992,11 +992,11 @@ giveup_altivec:
        SYNC
        MTMSRD(r5)                      /* enable use of AltiVec now */
        isync
-       cmpi    0,r3,0
+       cmpwi   0,r3,0
        beqlr-                          /* if no previous owner, done */
        addi    r3,r3,THREAD            /* want THREAD of task */
        lwz     r5,PT_REGS(r3)
-       cmpi    0,r5,0
+       cmpwi   0,r5,0
        SAVE_32VR(0, r4, r3)
        mfvscr  vr0
        li      r4,THREAD_VSCR
@@ -1030,11 +1030,11 @@ giveup_fpu:
        MTMSRD(r5)                      /* enable use of fpu now */
        SYNC_601
        isync
-       cmpi    0,r3,0
+       cmpwi   0,r3,0
        beqlr-                          /* if no previous owner, done */
        addi    r3,r3,THREAD            /* want THREAD of task */
        lwz     r5,PT_REGS(r3)
-       cmpi    0,r5,0
+       cmpwi   0,r5,0
        SAVE_32FPRS(0, r3)
        mffs    fr0
        stfd    fr0,THREAD_FPSCR-4(r3)
@@ -1539,7 +1539,7 @@ initial_bats:
 #ifndef CONFIG_PPC64BRIDGE
        mfspr   r9,PVR
        rlwinm  r9,r9,16,16,31          /* r9 = 1 for 601, 4 for 604 */
-       cmpi    0,r9,1
+       cmpwi   0,r9,1
        bne     4f
        ori     r11,r11,4               /* set up BAT registers for 601 */
        li      r8,0x7f                 /* valid, block length = 8MB */
@@ -1591,7 +1591,7 @@ setup_disp_bat:
        lwz     r8,4(r8)
        mfspr   r9,PVR
        rlwinm  r9,r9,16,16,31          /* r9 = 1 for 601, 4 for 604 */
-       cmpi    0,r9,1
+       cmpwi   0,r9,1
        beq     1f
        mtspr   DBAT3L,r8
        mtspr   DBAT3U,r11
@@ -1633,7 +1633,7 @@ initial_mm_power4:
        blr
 
 #endif /* CONFIG_POWER4 */
-       
+
 #ifdef CONFIG_8260
 /* Jump into the system reset for the rom.
  * We first disable the MMU, and then jump to the ROM reset address.