/*
+ * arch/ppc/kernel/except_8xx.S
+ *
* PowerPC version
* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
* Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
. = 0x1200
DataStoreTLBMiss:
+#ifdef CONFIG_8xx_CPU6
stw r3, 8(r0)
+#endif
DO_8xx_CPU6(0x3f80, r3)
mtspr SPRN_M_TW, r10 /* Save a couple of working registers */
mfcr r10
lwz r11, 0(r0)
mtcr r11
lwz r11, 4(r0)
+#ifdef CONFIG_8xx_CPU6
lwz r3, 8(r0)
+#endif
rfi
/* This is an instruction TLB error on the MPC8xx. This could be due