/*
- * arch/ppc/platforms/ebony.h
- *
* Ebony board definitions
*
* Matt Porter <mporter@mvista.com>
/* F/W TLB mapping used in bootloader glue to reset EMAC */
#define PPC44x_EMAC0_MR0 0xE0000800
-/* Macros to get at Ebony VPD info */
-#define EBONY_VPD_BASE 0x00000001fffffe00ULL
-#define EBONY_VPD_SIZE 0x24
-#define EBONY_NA0_OFFSET 0x0c
-#define EBONY_NA1_OFFSET 0x18
-#define EBONY_NA0_ADDR(base) (base + EBONY_NA0_OFFSET)
-#define EBONY_NA1_ADDR(base) (base + EBONY_NA1_OFFSET)
+/* Where to find the MAC info */
+#define OPENBIOS_MAC_BASE 0xfffffe0c
+#define OPENBIOS_MAC_OFFSET 0x0c
/* Default clock rates for Rev. B and Rev. C silicon */
#define EBONY_440GP_RB_SYSCLK 33000000
#define EBONY_RTC_SIZE 0x2000
/* Flash */
-#define EBONY_FPGA_ADDR 0x0000000148300000
+#define EBONY_FPGA_ADDR 0x0000000148300000ULL
#define EBONY_BOOT_SMALL_FLASH(x) (x & 0x20)
#define EBONY_ONBRD_FLASH_EN(x) (x & 0x02)
#define EBONY_FLASH_SEL(x) (x & 0x01)
-#define EBONY_SMALL_FLASH_LOW1 0x00000001ff800000
-#define EBONY_SMALL_FLASH_LOW2 0x00000001ff880000
-#define EBONY_SMALL_FLASH_HIGH1 0x00000001fff00000
-#define EBONY_SMALL_FLASH_HIGH2 0x00000001fff80000
+#define EBONY_SMALL_FLASH_LOW1 0x00000001ff800000ULL
+#define EBONY_SMALL_FLASH_LOW2 0x00000001ff880000ULL
+#define EBONY_SMALL_FLASH_HIGH1 0x00000001fff00000ULL
+#define EBONY_SMALL_FLASH_HIGH2 0x00000001fff80000ULL
#define EBONY_SMALL_FLASH_SIZE 0x80000
-#define EBONY_LARGE_FLASH_LOW 0x00000001ff800000
-#define EBONY_LARGE_FLASH_HIGH 0x00000001ffc00000
+#define EBONY_LARGE_FLASH_LOW 0x00000001ff800000ULL
+#define EBONY_LARGE_FLASH_HIGH 0x00000001ffc00000ULL
#define EBONY_LARGE_FLASH_SIZE 0x400000
-#define EBONY_SMALL_FLASH_BASE 0x00000001fff80000
-#define EBONY_LARGE_FLASH_BASE 0x00000001ff800000
+#define EBONY_SMALL_FLASH_BASE 0x00000001fff80000ULL
+#define EBONY_LARGE_FLASH_BASE 0x00000001ff800000ULL
/*
* Serial port defines
*/
-/* OpenBIOS defined UART mappings, used before early_serial_setup */
-#define UART0_IO_BASE (u8 *) 0xE0000200
-#define UART1_IO_BASE (u8 *) 0xE0000300
+#if defined(__BOOTER__)
+/* OpenBIOS defined UART mappings, used by bootloader shim */
+#define UART0_IO_BASE 0xE0000200
+#define UART1_IO_BASE 0xE0000300
+#else
+/* head_44x.S created UART mapping, used before early_serial_setup.
+ * We cannot use default OpenBIOS UART mappings because they
+ * don't work for configurations with more than 512M RAM. --ebs
+ */
+#define UART0_IO_BASE 0xF0000200
+#define UART1_IO_BASE 0xF0000300
+#endif
/* external Epson SG-615P */
#define BASE_BAUD 691200
#define STD_UART_OP(num) \
{ 0, BASE_BAUD, 0, UART##num##_INT, \
(ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
- iomem_base: UART##num##_IO_BASE, \
+ iomem_base: (void*)UART##num##_IO_BASE, \
io_type: SERIAL_IO_MEM},
#define SERIAL_PORT_DFNS \