/* Global Operations */
static void openpic_disable_8259_pass_through(void);
+static void openpic_set_priority(u_int pri);
static void openpic_set_spurious(u_int vector);
#ifdef CONFIG_SMP
#endif /* CONFIG_SMP */
#ifdef CONFIG_EPIC_SERIAL_MODE
-/* On platforms that may use EPIC serial mode, the default is enabled. */
-int epic_serial_mode = 1;
-
static void __init openpic_eicr_set_clk(u_int clkval)
{
openpic_writefield(&OpenPIC->Global.Global_Configuration1,
openpic_set_spurious(OPENPIC_VEC_SPURIOUS);
openpic_disable_8259_pass_through();
#ifdef CONFIG_EPIC_SERIAL_MODE
- if (epic_serial_mode) {
- openpic_eicr_set_clk(7); /* Slowest value until we know better */
- openpic_enable_sie();
- }
+ openpic_eicr_set_clk(7); /* Slowest value until we know better */
+ openpic_enable_sie();
#endif
openpic_set_priority(0);
}
#endif /* notused */
-void openpic_set_priority(u_int pri)
+static void __init openpic_set_priority(u_int pri)
{
DECL_THIS_CPU;
/*
* Hookup a cascade to the OpenPIC.
*/
-
-static struct irqaction openpic_cascade_irqaction = {
- .handler = no_action,
- .flags = SA_INTERRUPT,
- .mask = CPU_MASK_NONE,
-};
-
void __init
openpic_hookup_cascade(u_int irq, char *name,
int (*cascade_fn)(struct pt_regs *))
{
openpic_cascade_irq = irq;
openpic_cascade_fn = cascade_fn;
-
- if (setup_irq(irq, &openpic_cascade_irqaction))
+ if (request_irq(irq, no_action, SA_INTERRUPT, name, NULL))
printk("Unable to get OpenPIC IRQ %d for cascade\n",
irq - open_pic_irq_offset);
}
return 0;
}
- openpic_set_priority(0xf);
-
open_pic.enable = openpic_cached_enable_irq;
open_pic.disable = openpic_cached_disable_irq;
open_pic.enable = openpic_enable_irq;
open_pic.disable = openpic_disable_irq;
- openpic_set_priority(0);
-
spin_unlock_irqrestore(&openpic_setup_lock, flags);
return 0;