#include <asm/thread_info.h>
#include <asm/offsets.h>
#include <asm/unistd.h>
+#include <asm/page.h>
/*
* Stack layout for the system_call stack entry.
* The first few entries are identical to the user_regs_struct.
*/
-SP_PTREGS = STACK_FRAME_OVERHEAD
+SP_PTREGS = STACK_FRAME_OVERHEAD
+SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4
SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP
SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
-_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_RESTART_SVC)
+_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \
+ _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NEED_RESCHED)
+STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
+STACK_SIZE = 1 << STACK_SHIFT
+
#define BASED(name) name-system_call(%r13)
/*
* R15 - kernel stack pointer
*/
- .macro SAVE_ALL_BASE psworg,savearea,sync
- stm %r12,%r15,\savearea
- l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
+ .macro STORE_TIMER lc_offset
+#ifdef CONFIG_VIRT_CPU_ACCOUNTING
+ stpt \lc_offset
+#endif
.endm
- .macro CLEANUP_SAVE_ALL_BASE psworg,savearea,sync
- l %r1,SP_PSW+4(%r15)
- cli 1(%r1),0xcf
- jne 0f
- mvc \savearea(16),SP_R12(%r15)
-0: st %r13,SP_R13(%r15)
+#ifdef CONFIG_VIRT_CPU_ACCOUNTING
+ .macro UPDATE_VTIME lc_from,lc_to,lc_sum
+ lm %r10,%r11,\lc_from
+ sl %r10,\lc_to
+ sl %r11,\lc_to+4
+ bc 3,BASED(0f)
+ sl %r10,BASED(.Lc_1)
+0: al %r10,\lc_sum
+ al %r11,\lc_sum+4
+ bc 12,BASED(1f)
+ al %r10,BASED(.Lc_1)
+1: stm %r10,%r11,\lc_sum
.endm
+#endif
- .macro SAVE_ALL psworg,savearea,sync
- .if \sync
- tm \psworg+1,0x01 # test problem state bit
- bz BASED(1f) # skip stack setup save
- l %r15,__LC_KERNEL_STACK # problem state -> load ksp
- .else
- tm \psworg+1,0x01 # test problem state bit
- bnz BASED(0f) # from user -> load async stack
- l %r14,__LC_ASYNC_STACK # are we already on the async stack ?
- slr %r14,%r15
- sra %r14,13
- be BASED(1f)
-0: l %r15,__LC_ASYNC_STACK
- .endif
-1: s %r15,BASED(.Lc_spsize) # make room for registers & psw
- l %r14,BASED(.L\psworg)
- slr %r12,%r12
- icm %r14,12,__LC_SVC_ILC
- stm %r0,%r11,SP_R0(%r15) # store gprs 0-12 to kernel stack
- st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
- mvc SP_R12(16,%r15),\savearea # move R13-R15 to stack
- mvc SP_PSW(8,%r15),\psworg # move user PSW to stack
- st %r14,SP_ILC(%r15)
- st %r12,0(%r15) # clear back chain
- .endm
-
- .macro CLEANUP_SAVE_ALL psworg,savearea,sync
- l %r1,\savearea+12
+ .macro SAVE_ALL_BASE savearea
+ stm %r12,%r15,\savearea
+ l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
+ .endm
+
+ .macro SAVE_ALL psworg,savearea,sync
+ la %r12,\psworg
.if \sync
- tm \psworg+1,0x01
- bz BASED(1f)
- l %r1,__LC_KERNEL_STACK
+ tm \psworg+1,0x01 # test problem state bit
+ bz BASED(2f) # skip stack setup save
+ l %r15,__LC_KERNEL_STACK # problem state -> load ksp
.else
- tm \psworg+1,0x01
- bnz BASED(0f)
- l %r0,__LC_ASYNC_STACK
- slr %r0,%r1
- sra %r0,13
- bz BASED(1f)
-0: l %r1,__LC_ASYNC_STACK
+ tm \psworg+1,0x01 # test problem state bit
+ bnz BASED(1f) # from user -> load async stack
+ clc \psworg+4(4),BASED(.Lcritical_end)
+ bhe BASED(0f)
+ clc \psworg+4(4),BASED(.Lcritical_start)
+ bl BASED(0f)
+ l %r14,BASED(.Lcleanup_critical)
+ basr %r14,%r14
+ tm 0(%r12),0x01 # retest problem state after cleanup
+ bnz BASED(1f)
+0: l %r14,__LC_ASYNC_STACK # are we already on the async stack ?
+ slr %r14,%r15
+ sra %r14,STACK_SHIFT
+ be BASED(2f)
+1: l %r15,__LC_ASYNC_STACK
.endif
-1: s %r1,BASED(.Lc_spsize)
- st %r1,SP_R15(%r15)
- l %r0,BASED(.L\psworg)
- xc SP_R12(4,%r15),SP_R12(%r15)
- icm %r0,12,__LC_SVC_ILC
- st %r0,SP_R14(%r15)
- mvc SP_R0(48,%r1),SP_R0(%r15)
- mvc SP_ORIG_R2(4,%r1),SP_R2(%r15)
- mvc SP_R12(16,%r1),\savearea
- mvc SP_PSW(8,%r1),\psworg
- st %r0,SP_ILC(%r1)
- xc 0(4,%r1),0(%r1)
- .endm
-
- .macro RESTORE_ALL # system exit macro
- mvc __LC_RETURN_PSW(8),SP_PSW(%r15) # move user PSW to lowcore
- ni __LC_RETURN_PSW+1,0xfd # clear wait state bit
- lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
- lpsw __LC_RETURN_PSW # back to caller
- .endm
-
- .macro CLEANUP_RESTORE_ALL
- l %r1,SP_PSW+4(%r15)
- cli 0(%r1),0x82
- jne 0f
- mvc SP_PSW(8,%r15),__LC_RETURN_PSW
- j 1f
-0: l %r1,SP_R15(%r15)
- mvc SP_PSW(8,%r15),SP_PSW(%r1)
- mvc SP_R0(64,%r15),SP_R0(%r1)
-1:
+#ifdef CONFIG_CHECK_STACK
+ b BASED(3f)
+2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
+ bz BASED(stack_overflow)
+3:
+#endif
+2: s %r15,BASED(.Lc_spsize) # make room for registers & psw
+ mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
+ la %r12,\psworg
+ st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
+ icm %r12,12,__LC_SVC_ILC
+ stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
+ st %r12,SP_ILC(%r15)
+ mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
+ la %r12,0
+ st %r12,__SF_BACKCHAIN(%r15) # clear back chain
.endm
- .macro GET_THREAD_INFO
- l %r9,__LC_THREAD_INFO
- .endm
-
- .macro CHECK_CRITICAL
- tm SP_PSW+1(%r15),0x01 # test problem state bit
- bnz BASED(0f) # from user -> not critical
- clc SP_PSW+4(4,%r15),BASED(.Lcritical_end)
- jnl 0f
- clc SP_PSW+4(4,%r15),BASED(.Lcritical_start)
- jl 0f
- l %r1,BASED(.Lcleanup_critical)
- basr %r14,%r1
-0:
+ .macro RESTORE_ALL sync
+ mvc __LC_RETURN_PSW(8),SP_PSW(%r15) # move user PSW to lowcore
+ .if !\sync
+ ni __LC_RETURN_PSW+1,0xfd # clear wait state bit
+ .endif
+ lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
+ STORE_TIMER __LC_EXIT_TIMER
+ lpsw __LC_RETURN_PSW # back to caller
.endm
/*
__switch_to_base:
tm __THREAD_per(%r3),0xe8 # new process is using per ?
bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine
- stctl %c9,%c11,24(%r15) # We are using per stuff
- clc __THREAD_per(12,%r3),24(%r15)
+ stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff
+ clc __THREAD_per(12,%r3),__SF_EMPTY(%r15)
be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's
lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't
__switch_to_noper:
- stm %r6,%r15,24(%r15) # store __switch_to registers of prev task
+ stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
- lm %r6,%r15,24(%r15) # load __switch_to registers of next task
+ lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
st %r3,__LC_CURRENT # __LC_CURRENT = current task struct
+ lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
l %r3,__THREAD_info(%r3) # load thread_info from task struct
st %r3,__LC_THREAD_INFO
- ahi %r3,8192
+ ahi %r3,STACK_SIZE
st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
br %r14
-/*
- * do_softirq calling function. We want to run the softirq functions on the
- * asynchronous interrupt stack.
- */
- .global do_call_softirq
-do_call_softirq:
- stnsm 24(%r15),0xfc
- stm %r12,%r15,28(%r15)
- lr %r12,%r15
- basr %r13,0
-do_call_base:
- l %r0,__LC_ASYNC_STACK
- slr %r0,%r15
- sra %r0,13
- be 0f-do_call_base(%r13)
- l %r15,__LC_ASYNC_STACK
-0: sl %r15,.Lc_overhead-do_call_base(%r13)
- st %r12,0(%r15) # store backchain
- l %r1,.Ldo_softirq-do_call_base(%r13)
- basr %r14,%r1
- lm %r12,%r15,28(%r12)
- ssm 24(%r15)
- br %r14
-
__critical_start:
/*
* SVC interrupt handler routine. System calls are synchronous events and
.globl system_call
system_call:
- SAVE_ALL_BASE __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
+ STORE_TIMER __LC_SYNC_ENTER_TIMER
+sysc_saveall:
+ SAVE_ALL_BASE __LC_SAVE_AREA
SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
lh %r7,0x8a # get svc number from lowcore
-sysc_enter:
- GET_THREAD_INFO # load pointer to task_struct to R9
+#ifdef CONFIG_VIRT_CPU_ACCOUNTING
+sysc_vtime:
+ tm SP_PSW+1(%r15),0x01 # interrupting from user ?
+ bz BASED(sysc_do_svc)
+ UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
+sysc_stime:
+ UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
+sysc_update:
+ mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
+#endif
+sysc_do_svc:
+ l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
sla %r7,2 # *4 and test for svc 0
- bnz BASED(sysc_do_restart) # svc number > 0
+ bnz BASED(sysc_nr_ok) # svc number > 0
# svc 0: system call number in %r1
cl %r1,BASED(.Lnr_syscalls)
- bnl BASED(sysc_do_restart)
+ bnl BASED(sysc_nr_ok)
lr %r7,%r1 # copy svc number to %r7
sla %r7,2 # *4
+sysc_nr_ok:
+ mvc SP_ARGS(4,%r15),SP_R7(%r15)
sysc_do_restart:
tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
l %r8,sys_call_table-system_call(%r7,%r13) # get system call addr.
- bo BASED(sysc_tracesys)
+ bnz BASED(sysc_tracesys)
basr %r14,%r8 # call sys_xxxx
st %r2,SP_R2(%r15) # store return value (change R2 on stack)
# ATTENTION: check sys_execve_glue before
tm __TI_flags+3(%r9),_TIF_WORK_SVC
bnz BASED(sysc_work) # there is work to do (signals etc.)
sysc_leave:
- RESTORE_ALL
+ RESTORE_ALL 1
#
# recheck if there is more work to do
#
sysc_work_loop:
- GET_THREAD_INFO # load pointer to task_struct to R9
tm __TI_flags+3(%r9),_TIF_WORK_SVC
bz BASED(sysc_leave) # there is no work to do
#
# One of the work bits is on. Find out which one.
-# Checked are: _TIF_SIGPENDING and _TIF_NEED_RESCHED
#
sysc_work:
tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
bo BASED(sysc_sigpending)
tm __TI_flags+3(%r9),_TIF_RESTART_SVC
bo BASED(sysc_restart)
+ tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
+ bo BASED(sysc_singlestep)
b BASED(sysc_leave)
#
# _TIF_SIGPENDING is set, call do_signal
#
sysc_sigpending:
+ ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
la %r2,SP_PTREGS(%r15) # load pt_regs
sr %r3,%r3 # clear *oldset
l %r1,BASED(.Ldo_signal)
basr %r14,%r1 # call do_signal
tm __TI_flags+3(%r9),_TIF_RESTART_SVC
bo BASED(sysc_restart)
+ tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
+ bo BASED(sysc_singlestep)
b BASED(sysc_leave) # out of here, do NOT recheck
#
lm %r2,%r6,SP_R2(%r15) # load svc arguments
b BASED(sysc_do_restart) # restart svc
+#
+# _TIF_SINGLE_STEP is set, call do_single_step
+#
+sysc_singlestep:
+ ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
+ mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check
+ la %r2,SP_PTREGS(%r15) # address of register-save area
+ l %r1,BASED(.Lhandle_per) # load adr. of per handler
+ la %r14,BASED(sysc_return) # load adr. of system return
+ br %r1 # branch to do_single_step
+
__critical_end:
#
st %r2,SP_R2(%r15) # store return value
sysc_tracenogo:
tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
- bno BASED(sysc_return)
+ bz BASED(sysc_return)
l %r1,BASED(.Ltrace)
la %r2,SP_PTREGS(%r15) # load pt_regs
la %r3,1
.globl ret_from_fork
ret_from_fork:
l %r13,__LC_SVC_NEW_PSW+4
- GET_THREAD_INFO # load pointer to task_struct to R9
- l %r1,BASED(.Lschedtail)
+ l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
+ tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
+ bo BASED(0f)
+ st %r15,SP_R15(%r15) # store stack pointer for new kthread
+0: l %r1,BASED(.Lschedtail)
basr %r14,%r1
- stosm 24(%r15),0x03 # reenable interrupts
+ stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
b BASED(sysc_return)
#
* we just ignore the PER event (FIXME: is there anything we have to do
* for LPSW?).
*/
- SAVE_ALL_BASE __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
+ STORE_TIMER __LC_SYNC_ENTER_TIMER
+ SAVE_ALL_BASE __LC_SAVE_AREA
tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
bnz BASED(pgm_per) # got per exception -> special case
SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
+#ifdef CONFIG_VIRT_CPU_ACCOUNTING
+ tm SP_PSW+1(%r15),0x01 # interrupting from user ?
+ bz BASED(pgm_no_vtime)
+ UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
+ UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
+ mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
+pgm_no_vtime:
+#endif
+ l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
l %r3,__LC_PGM_ILC # load program interruption code
la %r8,0x7f
- l %r7,BASED(.Ljump_table)
nr %r8,%r3
+pgm_do_call:
+ l %r7,BASED(.Ljump_table)
sll %r8,2
- GET_THREAD_INFO
l %r7,0(%r8,%r7) # load address of handler routine
la %r2,SP_PTREGS(%r15) # address of register-save area
la %r14,BASED(sysc_return)
clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW
be BASED(pgm_svcper)
# no interesting special case, ignore PER event
- lm %r13,%r15,__LC_SAVE_AREA
+ lm %r12,%r15,__LC_SAVE_AREA
lpsw 0x28
#
#
pgm_per_std:
SAVE_ALL __LC_PGM_OLD_PSW,__LC_SAVE_AREA,1
- GET_THREAD_INFO
- mvc __THREAD_per+__PER_atmid(2,%r9),__LC_PER_ATMID
- mvc __THREAD_per+__PER_address(4,%r9),__LC_PER_ADDRESS
- mvc __THREAD_per+__PER_access_id(1,%r9),__LC_PER_ACCESS_ID
- la %r4,0x7f
+#ifdef CONFIG_VIRT_CPU_ACCOUNTING
+ tm SP_PSW+1(%r15),0x01 # interrupting from user ?
+ bz BASED(pgm_no_vtime2)
+ UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
+ UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
+ mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
+pgm_no_vtime2:
+#endif
+ l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
+ l %r1,__TI_task(%r9)
+ mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
+ mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
+ mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
+ oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
l %r3,__LC_PGM_ILC # load program interruption code
- nr %r4,%r3 # clear per-event-bit and ilc
- be BASED(pgm_per_only) # only per or per+check ?
- l %r1,BASED(.Ljump_table)
- sll %r4,2
- l %r1,0(%r4,%r1) # load address of handler routine
- la %r2,SP_PTREGS(%r15) # address of register-save area
- basr %r14,%r1 # branch to interrupt-handler
-pgm_per_only:
- la %r2,SP_PTREGS(15) # address of register-save area
- l %r1,BASED(.Lhandle_per) # load adr. of per handler
- la %r14,BASED(sysc_return) # load adr. of system return
- br %r1 # branch to do_debugger_trap
+ la %r8,0x7f
+ nr %r8,%r3 # clear per-event-bit and ilc
+ be BASED(sysc_return) # only per or per+check ?
+ b BASED(pgm_do_call)
#
# it was a single stepped SVC that is causing all the trouble
#
pgm_svcper:
SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
- lh %r7,0x8a # get svc number from lowcore
- stosm 24(%r15),0x03 # reenable interrupts
- GET_THREAD_INFO # load pointer to task_struct to R9
- mvc __THREAD_per+__PER_atmid(2,%r9),__LC_PER_ATMID
- mvc __THREAD_per+__PER_address(4,%r9),__LC_PER_ADDRESS
- mvc __THREAD_per+__PER_access_id(1,%r9),__LC_PER_ACCESS_ID
- sla %r7,2 # *4 and test for svc 0
- bnz BASED(pgm_svcstd) # svc number > 0 ?
- # svc 0: system call number in %r1
- cl %r1,BASED(.Lnr_syscalls)
- bnl BASED(pgm_svcstd)
- lr %r7,%r1 # copy svc number to %r7
- sla %r7,2 # *4
-pgm_svcstd:
- tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
- l %r8,sys_call_table-system_call(%r7,%r13) # get system call addr.
- bo BASED(pgm_tracesys)
- basr %r14,%r8 # call sys_xxxx
- st %r2,SP_R2(%r15) # store return value (change R2 on stack)
- # ATTENTION: check sys_execve_glue before
- # changing anything here !!
-
-pgm_svcret:
- tm __TI_flags+3(%r9),_TIF_SIGPENDING
- bno BASED(pgm_svcper_nosig)
- la %r2,SP_PTREGS(%r15) # load pt_regs
- sr %r3,%r3 # clear *oldset
- l %r1,BASED(.Ldo_signal)
- basr %r14,%r1 # call do_signal
-
-pgm_svcper_nosig:
- mvi SP_TRAP+3(%r15),0x28 # set trap indication to pgm check
- la %r2,SP_PTREGS(15) # address of register-save area
- l %r1,BASED(.Lhandle_per) # load adr. of per handler
- la %r14,BASED(sysc_return) # load adr. of system return
- br %r1 # branch to do_debugger_trap
-#
-# call trace before and after sys_call
-#
-pgm_tracesys:
- l %r1,BASED(.Ltrace)
- la %r2,SP_PTREGS(%r15) # load pt_regs
- la %r3,0
- srl %r7,2
- st %r7,SP_R2(%r15)
- basr %r14,%r1
- clc SP_R2(4,%r15),BASED(.Lnr_syscalls)
- bnl BASED(pgm_svc_nogo)
- l %r7,SP_R2(%r15) # strace changed the syscall
- sll %r7,2
- l %r8,sys_call_table-system_call(%r7,%r13)
-pgm_svc_go:
- lm %r3,%r6,SP_R3(%r15)
- l %r2,SP_ORIG_R2(%r15)
- basr %r14,%r8 # call sys_xxx
- st %r2,SP_R2(%r15) # store return value
-pgm_svc_nogo:
- tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
- bno BASED(pgm_svcret)
- l %r1,BASED(.Ltrace)
- la %r2,SP_PTREGS(%r15) # load pt_regs
- la %r3,1
- la %r14,BASED(pgm_svcret)
- br %r1
+#ifdef CONFIG_VIRT_CPU_ACCOUNTING
+ tm SP_PSW+1(%r15),0x01 # interrupting from user ?
+ bz BASED(pgm_no_vtime3)
+ UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
+ UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
+ mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
+pgm_no_vtime3:
+#endif
+ lh %r7,0x8a # get svc number from lowcore
+ l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
+ l %r1,__TI_task(%r9)
+ mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
+ mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
+ mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
+ oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
+ stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
+ b BASED(sysc_do_svc)
/*
* IO interrupt handler routine
.globl io_int_handler
io_int_handler:
- SAVE_ALL_BASE __LC_IO_OLD_PSW,__LC_SAVE_AREA+16,0
- SAVE_ALL __LC_IO_OLD_PSW,__LC_SAVE_AREA+16,0
+ STORE_TIMER __LC_ASYNC_ENTER_TIMER
stck __LC_INT_CLOCK
- CHECK_CRITICAL
- GET_THREAD_INFO # load pointer to task_struct to R9
+ SAVE_ALL_BASE __LC_SAVE_AREA+16
+ SAVE_ALL __LC_IO_OLD_PSW,__LC_SAVE_AREA+16,0
+#ifdef CONFIG_VIRT_CPU_ACCOUNTING
+ tm SP_PSW+1(%r15),0x01 # interrupting from user ?
+ bz BASED(io_no_vtime)
+ UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
+ UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
+ mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
+io_no_vtime:
+#endif
+ l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ
la %r2,SP_PTREGS(%r15) # address of register-save area
basr %r14,%r1 # branch to standard irq handler
tm __TI_flags+3(%r9),_TIF_WORK_INT
bnz BASED(io_work) # there is work to do (signals etc.)
io_leave:
- RESTORE_ALL
+ RESTORE_ALL 0
#ifdef CONFIG_PREEMPT
io_preempt:
l %r1,SP_R15(%r15)
s %r1,BASED(.Lc_spsize)
mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
- xc 0(4,%r1),0(%r1) # clear back chain
+ xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
lr %r15,%r1
io_resume_loop:
tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
bno BASED(io_leave)
mvc __TI_precount(4,%r9),BASED(.Lc_pactive)
- stosm 24(%r15),0x03 # reenable interrupts
+ stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
l %r1,BASED(.Lschedule)
basr %r14,%r1 # call schedule
- stnsm 24(%r15),0xfc # disable I/O and ext. interrupts
- GET_THREAD_INFO # load pointer to task_struct to R9
+ stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
xc __TI_precount(4,%r9),__TI_precount(%r9)
b BASED(io_resume_loop)
#endif
l %r1,__LC_KERNEL_STACK
s %r1,BASED(.Lc_spsize)
mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
- xc 0(4,%r1),0(%r1) # clear back chain
+ xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
lr %r15,%r1
#
# One of the work bits is on. Find out which one.
#
io_reschedule:
l %r1,BASED(.Lschedule)
- stosm 24(%r15),0x03 # reenable interrupts
+ stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
basr %r14,%r1 # call scheduler
- stnsm 24(%r15),0xfc # disable I/O and ext. interrupts
- GET_THREAD_INFO # load pointer to task_struct to R9
+ stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
tm __TI_flags+3(%r9),_TIF_WORK_INT
bz BASED(io_leave) # there is no work to do
b BASED(io_work_loop)
# _TIF_SIGPENDING is set, call do_signal
#
io_sigpending:
- stosm 24(%r15),0x03 # reenable interrupts
+ stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
la %r2,SP_PTREGS(%r15) # load pt_regs
sr %r3,%r3 # clear *oldset
l %r1,BASED(.Ldo_signal)
basr %r14,%r1 # call do_signal
- stnsm 24(%r15),0xfc # disable I/O and ext. interrupts
+ stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
b BASED(io_leave) # out of here, do NOT recheck
/*
.globl ext_int_handler
ext_int_handler:
- SAVE_ALL_BASE __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16,0
- SAVE_ALL __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16,0
+ STORE_TIMER __LC_ASYNC_ENTER_TIMER
stck __LC_INT_CLOCK
- CHECK_CRITICAL
- GET_THREAD_INFO # load pointer to task_struct to R9
+ SAVE_ALL_BASE __LC_SAVE_AREA+16
+ SAVE_ALL __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16,0
+#ifdef CONFIG_VIRT_CPU_ACCOUNTING
+ tm SP_PSW+1(%r15),0x01 # interrupting from user ?
+ bz BASED(ext_no_vtime)
+ UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
+ UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
+ mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
+ext_no_vtime:
+#endif
+ l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
la %r2,SP_PTREGS(%r15) # address of register-save area
lh %r3,__LC_EXT_INT_CODE # get interruption code
l %r1,BASED(.Ldo_extint)
.globl mcck_int_handler
mcck_int_handler:
- SAVE_ALL_BASE __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32,0
+ STORE_TIMER __LC_ASYNC_ENTER_TIMER
+ SAVE_ALL_BASE __LC_SAVE_AREA+32
SAVE_ALL __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32,0
+#ifdef CONFIG_VIRT_CPU_ACCOUNTING
+ tm SP_PSW+1(%r15),0x01 # interrupting from user ?
+ bz BASED(mcck_no_vtime)
+ UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
+ UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
+ mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
+mcck_no_vtime:
+#endif
l %r1,BASED(.Ls390_mcck)
basr %r14,%r1 # call machine check handler
mcck_return:
- RESTORE_ALL
+ RESTORE_ALL 0
#ifdef CONFIG_SMP
/*
l %r15,__LC_SAVE_AREA+60 # load ksp
lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
lam %a0,%a15,__LC_AREGS_SAVE_AREA
- stosm 0(%r15),0x04 # now we can turn dat on
- lm %r6,%r15,24(%r15) # load registers from clone
+ lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone
+ stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
basr %r14,0
l %r14,restart_addr-.(%r14)
br %r14 # branch to start_secondary
restart_go:
#endif
-cleanup_table:
- .long system_call, sysc_enter, cleanup_sysc_enter
- .long sysc_return, sysc_leave, cleanup_sysc_return
- .long sysc_leave, sysc_work_loop, cleanup_sysc_leave
- .long sysc_work_loop, sysc_reschedule, cleanup_sysc_return
-cleanup_table_entries=(.-cleanup_table) / 12
+#ifdef CONFIG_CHECK_STACK
+/*
+ * The synchronous or the asynchronous stack overflowed. We are dead.
+ * No need to properly save the registers, we are going to panic anyway.
+ * Setup a pt_regs so that show_trace can provide a good call trace.
+ */
+stack_overflow:
+ l %r15,__LC_PANIC_STACK # change to panic stack
+ sl %r15,BASED(.Lc_spsize)
+ mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
+ stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
+ la %r1,__LC_SAVE_AREA
+ ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ?
+ be BASED(0f)
+ ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ?
+ be BASED(0f)
+ la %r1,__LC_SAVE_AREA+16
+0: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack
+ xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain
+ l %r1,BASED(1f) # branch to kernel_stack_overflow
+ la %r2,SP_PTREGS(%r15) # load pt_regs
+ br %r1
+1: .long kernel_stack_overflow
+#endif
+
+cleanup_table_system_call:
+ .long system_call + 0x80000000, sysc_do_svc + 0x80000000
+cleanup_table_sysc_return:
+ .long sysc_return + 0x80000000, sysc_leave + 0x80000000
+cleanup_table_sysc_leave:
+ .long sysc_leave + 0x80000000, sysc_work_loop + 0x80000000
+cleanup_table_sysc_work_loop:
+ .long sysc_work_loop + 0x80000000, sysc_reschedule + 0x80000000
cleanup_critical:
- lhi %r0,cleanup_table_entries
- la %r1,BASED(cleanup_table)
- l %r2,SP_PSW+4(%r15)
- la %r2,0(%r2)
-cleanup_loop:
- cl %r2,0(%r1)
- bl BASED(cleanup_cont)
- cl %r2,4(%r1)
- bl BASED(cleanup_found)
-cleanup_cont:
- la %r1,12(%r1)
- bct %r0,BASED(cleanup_loop)
+ clc 4(4,%r12),BASED(cleanup_table_system_call)
+ bl BASED(0f)
+ clc 4(4,%r12),BASED(cleanup_table_system_call+4)
+ bl BASED(cleanup_system_call)
+0:
+ clc 4(4,%r12),BASED(cleanup_table_sysc_return)
+ bl BASED(0f)
+ clc 4(4,%r12),BASED(cleanup_table_sysc_return+4)
+ bl BASED(cleanup_sysc_return)
+0:
+ clc 4(4,%r12),BASED(cleanup_table_sysc_leave)
+ bl BASED(0f)
+ clc 4(4,%r12),BASED(cleanup_table_sysc_leave+4)
+ bl BASED(cleanup_sysc_leave)
+0:
+ clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop)
+ bl BASED(0f)
+ clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4)
+ bl BASED(cleanup_sysc_leave)
+0:
br %r14
-cleanup_found:
- l %r1,8(%r1)
- br %r1
-cleanup_sysc_enter:
- CLEANUP_SAVE_ALL_BASE __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
- CLEANUP_SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
- lh %r0,0x8a
- st %r0,SP_R7(%r15)
- la %r1,BASED(sysc_enter)
- o %r1,BASED(.Lamode)
- st %r1,SP_PSW+4(%r15)
+cleanup_system_call:
+ mvc __LC_RETURN_PSW(8),0(%r12)
+#ifdef CONFIG_VIRT_CPU_ACCOUNTING
+ clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
+ bh BASED(0f)
+ mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
+0: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
+ bhe BASED(cleanup_vtime)
+#endif
+ clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
+ bh BASED(0f)
+ mvc __LC_SAVE_AREA(16),__LC_SAVE_AREA+16
+0: st %r13,__LC_SAVE_AREA+20
+ SAVE_ALL __LC_SVC_OLD_PSW,__LC_SAVE_AREA,1
+ st %r15,__LC_SAVE_AREA+28
+ lh %r7,0x8a
+#ifdef CONFIG_VIRT_CPU_ACCOUNTING
+cleanup_vtime:
+ clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
+ bhe BASED(cleanup_stime)
+ tm SP_PSW+1(%r15),0x01 # interrupting from user ?
+ bz BASED(cleanup_novtime)
+ UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
+cleanup_stime:
+ clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16)
+ bh BASED(cleanup_update)
+ UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
+cleanup_update:
+ mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
+cleanup_novtime:
+#endif
+ mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
+ la %r12,__LC_RETURN_PSW
br %r14
+cleanup_system_call_insn:
+ .long sysc_saveall + 0x80000000
+#ifdef CONFIG_VIRT_CPU_ACCOUNTING
+ .long system_call + 0x80000000
+ .long sysc_vtime + 0x80000000
+ .long sysc_stime + 0x80000000
+ .long sysc_update + 0x80000000
+#endif
cleanup_sysc_return:
- la %r1,BASED(sysc_return)
- o %r1,BASED(.Lamode)
- st %r1,SP_PSW+4(%r15)
+ mvc __LC_RETURN_PSW(4),0(%r12)
+ mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return)
+ la %r12,__LC_RETURN_PSW
br %r14
cleanup_sysc_leave:
- CLEANUP_RESTORE_ALL
+ clc 4(4,%r12),BASED(cleanup_sysc_leave_insn)
+ be BASED(0f)
+#ifdef CONFIG_VIRT_CPU_ACCOUNTING
+ mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
+ clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4)
+ be BASED(0f)
+#endif
+ mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
+ mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
+ lm %r0,%r11,SP_R0(%r15)
+ l %r15,SP_R15(%r15)
+0: la %r12,__LC_RETURN_PSW
br %r14
+cleanup_sysc_leave_insn:
+#ifdef CONFIG_VIRT_CPU_ACCOUNTING
+ .long sysc_leave + 14 + 0x80000000
+#endif
+ .long sysc_leave + 10 + 0x80000000
/*
* Integer constants
.Lc_overhead: .long STACK_FRAME_OVERHEAD
.Lc_pactive: .long PREEMPT_ACTIVE
.Lnr_syscalls: .long NR_syscalls
-.L0x018: .long 0x018
-.L0x020: .long 0x020
-.L0x028: .long 0x028
-.L0x030: .long 0x030
-.L0x038: .long 0x038
-.Lamode: .long 0x80000000
+.L0x018: .short 0x018
+.L0x020: .short 0x020
+.L0x028: .short 0x028
+.L0x030: .short 0x030
+.L0x038: .short 0x038
+.Lc_1: .long 1
/*
* Symbol constants
.Ldo_IRQ: .long do_IRQ
.Ldo_extint: .long do_extint
.Ldo_signal: .long do_signal
-.Ldo_softirq: .long do_softirq
-.Lhandle_per: .long do_debugger_trap
+.Lhandle_per: .long do_single_step
.Ljump_table: .long pgm_check_table
.Lschedule: .long schedule
.Lclone: .long sys_clone
git://git.onelab.eu / linux-2.6.git / blobdiff