vserver 1.9.5.x5

[linux-2.6.git] / arch / sh / mm / tlb-sh3.c

diff --git a/arch/sh/mm/tlb-sh3.c b/arch/sh/mm/tlb-sh3.c
index 88213ce..7a0d5c1 100644 (file)
--- a/arch/sh/mm/tlb-sh3.c
+++ b/arch/sh/mm/tlb-sh3.c
@@ -25,7 +25,6 @@
 #include <asm/io.h>
 #include <asm/uaccess.h>
 #include <asm/pgalloc.h>
-#include <asm/hardirq.h>
 #include <asm/mmu_context.h>
 #include <asm/cacheflush.h>
 
@@ -40,6 +39,16 @@ void update_mmu_cache(struct vm_area_struct * vma,
        if (vma && current->active_mm != vma->vm_mm)
                return;
 
+#if defined(CONFIG_SH7705_CACHE_32KB)
+       struct page *page;
+       page = pte_page(pte);
+       if (VALID_PAGE(page) && !test_bit(PG_mapped, &page->flags)) {
+               unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
+               __flush_wback_region((void *)P1SEGADDR(phys), PAGE_SIZE);
+               __set_bit(PG_mapped, &page->flags);
+       }
+#endif
+
        local_irq_save(flags);
 
        /* Set PTEH register */
@@ -72,7 +81,7 @@ void __flush_tlb_page(unsigned long asid, unsigned long page)
        addr = MMU_TLB_ADDRESS_ARRAY | (page & 0x1F000);
        data = (page & 0xfffe0000) | asid; /* VALID bit is off */
        
-       if (test_bit(CPU_HAS_MMU_PAGE_ASSOC, &(cpu_data->flags))) {
+       if ((cpu_data->flags & CPU_HAS_MMU_PAGE_ASSOC)) {
                addr |= MMU_PAGE_ASSOC_BIT;
                ways = 1;       /* we already know the way .. */
        }