void __cpuinit setup_local_APIC (void)
{
unsigned int value, maxlvt;
- int i, j;
value = apic_read(APIC_LVR);
value &= ~APIC_TPRI_MASK;
apic_write(APIC_TASKPRI, value);
- /*
- * After a crash, we no longer service the interrupts and a pending
- * interrupt from previous kernel might still have ISR bit set.
- *
- * Most probably by now CPU has serviced that pending interrupt and
- * it might not have done the ack_APIC_irq() because it thought,
- * interrupt came from i8259 as ExtInt. LAPIC did not get EOI so it
- * does not clear the ISR bit and cpu thinks it has already serivced
- * the interrupt. Hence a vector might get locked. It was noticed
- * for timer irq (vector 0x31). Issue an extra EOI to clear ISR.
- */
- for (i = APIC_ISR_NR - 1; i >= 0; i--) {
- value = apic_read(APIC_ISR + i*0x10);
- for (j = 31; j >= 0; j--) {
- if (value & (1<<j))
- ack_APIC_irq();
- }
- }
-
/*
* Now that we are all set up, enable the APIC
*/
printk(KERN_WARNING "APIC Verbosity level %s not recognised"
" use apic=verbose or apic=debug", str);
- return 1;
+ return 0;
}
__setup("apic=", apic_set_verbosity);
6: Received illegal vector
7: Illegal register address
*/
- if (num_online_cpus() > 1)
- printk (KERN_DEBUG "APIC error on CPU%d: %02x(%02x)\n",
+ printk (KERN_DEBUG "APIC error on CPU%d: %02x(%02x)\n",
smp_processor_id(), v , v1);
irq_exit();
}
static __init int setup_disableapic(char *str)
{
disable_apic = 1;
- return 1;
+ return 0;
}
static __init int setup_nolapic(char *str)
{
disable_apic = 1;
- return 1;
+ return 0;
}
static __init int setup_noapictimer(char *str)
{
if (str[0] != ' ' && str[0] != 0)
- return 0;
+ return -1;
disable_apic_timer = 1;
- return 1;
+ return 0;
}
static __init int setup_apicmaintimer(char *str)
{
apic_runs_main_timer = 1;
nohpet = 1;
- return 1;
+ return 0;
}
__setup("apicmaintimer", setup_apicmaintimer);
static __init int setup_noapicmaintimer(char *str)
{
apic_runs_main_timer = -1;
- return 1;
+ return 0;
}
__setup("noapicmaintimer", setup_noapicmaintimer);