#include <linux/atmdev.h>
#include <linux/sonet.h>
#include <linux/atm_suni.h>
+#include <linux/dma-mapping.h>
+#include <linux/delay.h>
#include <asm/io.h>
#include <asm/string.h>
#include <asm/page.h>
#endif
-extern const struct atmdev_ops fore200e_ops;
-extern const struct fore200e_bus fore200e_bus[];
+static const struct atmdev_ops fore200e_ops;
+static const struct fore200e_bus fore200e_bus[];
static struct fore200e* fore200e_boards = NULL;
static int
-fore200e_io_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
+fore200e_io_poll(struct fore200e* fore200e, volatile u32 __iomem *addr, u32 val, int msecs)
{
unsigned long timeout = jiffies + MSECS(msecs);
int ok;
{
int ok;
- fore200e->cp_monitor = (struct cp_monitor*)(fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET);
+ fore200e->cp_monitor = fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET;
fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat);
#ifdef CONFIG_ATM_FORE200E_PCA
-static u32 fore200e_pca_read(volatile u32* addr)
+static u32 fore200e_pca_read(volatile u32 __iomem *addr)
{
/* on big-endian hosts, the board is configured to convert
the endianess of slave RAM accesses */
}
-static void fore200e_pca_write(u32 val, volatile u32* addr)
+static void fore200e_pca_write(u32 val, volatile u32 __iomem *addr)
{
/* on big-endian hosts, the board is configured to convert
the endianess of slave RAM accesses */
DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
/* gain access to the PCA specific registers */
- fore200e->regs.pca.hcr = (u32*)(fore200e->virt_base + PCA200E_HCR_OFFSET);
- fore200e->regs.pca.imr = (u32*)(fore200e->virt_base + PCA200E_IMR_OFFSET);
- fore200e->regs.pca.psr = (u32*)(fore200e->virt_base + PCA200E_PSR_OFFSET);
+ fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET;
+ fore200e->regs.pca.imr = fore200e->virt_base + PCA200E_IMR_OFFSET;
+ fore200e->regs.pca.psr = fore200e->virt_base + PCA200E_PSR_OFFSET;
fore200e->state = FORE200E_STATE_MAP;
return 0;
opcode.opcode = OPCODE_GET_PROM;
opcode.pad = 0;
- prom_dma = fore200e->bus->dma_map(fore200e, prom, sizeof(struct prom_data), FORE200E_DMA_FROMDEVICE);
+ prom_dma = fore200e->bus->dma_map(fore200e, prom, sizeof(struct prom_data), DMA_FROM_DEVICE);
fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr);
*entry->status = STATUS_PENDING;
- fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.prom_block.opcode);
+ fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.prom_block.opcode);
ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
*entry->status = STATUS_FREE;
- fore200e->bus->dma_unmap(fore200e, prom_dma, sizeof(struct prom_data), FORE200E_DMA_FROMDEVICE);
+ fore200e->bus->dma_unmap(fore200e, prom_dma, sizeof(struct prom_data), DMA_FROM_DEVICE);
if (ok == 0) {
printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name);
#ifdef CONFIG_ATM_FORE200E_SBA
static u32
-fore200e_sba_read(volatile u32* addr)
+fore200e_sba_read(volatile u32 __iomem *addr)
{
return sbus_readl(addr);
}
static void
-fore200e_sba_write(u32 val, volatile u32* addr)
+fore200e_sba_write(u32 val, volatile u32 __iomem *addr)
{
sbus_writel(val, addr);
}
unsigned int bursts;
/* gain access to the SBA specific registers */
- fore200e->regs.sba.hcr = (u32*)sbus_ioremap(&sbus_dev->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
- fore200e->regs.sba.bsr = (u32*)sbus_ioremap(&sbus_dev->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR");
- fore200e->regs.sba.isr = (u32*)sbus_ioremap(&sbus_dev->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR");
- fore200e->virt_base = (u32*)sbus_ioremap(&sbus_dev->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM");
+ fore200e->regs.sba.hcr = sbus_ioremap(&sbus_dev->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
+ fore200e->regs.sba.bsr = sbus_ioremap(&sbus_dev->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR");
+ fore200e->regs.sba.isr = sbus_ioremap(&sbus_dev->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR");
+ fore200e->virt_base = sbus_ioremap(&sbus_dev->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM");
if (fore200e->virt_base == NULL) {
printk(FORE200E "unable to map RAM of device %s\n", fore200e->name);
static void
fore200e_sba_unmap(struct fore200e* fore200e)
{
- sbus_iounmap((ulong)fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
- sbus_iounmap((ulong)fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH);
- sbus_iounmap((ulong)fore200e->regs.sba.isr, SBA200E_ISR_LENGTH);
- sbus_iounmap((ulong)fore200e->virt_base, SBA200E_RAM_LENGTH);
+ sbus_iounmap(fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
+ sbus_iounmap(fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH);
+ sbus_iounmap(fore200e->regs.sba.isr, SBA200E_ISR_LENGTH);
+ sbus_iounmap(fore200e->virt_base, SBA200E_RAM_LENGTH);
}
/* remove DMA mapping */
fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
- FORE200E_DMA_TODEVICE);
+ DMA_TO_DEVICE);
vc_map = entry->vc_map;
buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
/* Make device DMA transfer visible to CPU. */
- fore200e->bus->dma_sync_for_cpu(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, FORE200E_DMA_FROMDEVICE);
+ fore200e->bus->dma_sync_for_cpu(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE);
memcpy(skb_put(skb, rpd->rsd[ i ].length), buffer->data.align_addr, rpd->rsd[ i ].length);
/* Now let the device get at it again. */
- fore200e->bus->dma_sync_for_device(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, FORE200E_DMA_FROMDEVICE);
+ fore200e->bus->dma_sync_for_device(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE);
}
DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize);
#endif
/* the MTU is not used by the cp, except in the case of AAL0 */
fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu);
- fore200e->bus->write(*(u32*)&vpvc, (u32*)&entry->cp_entry->cmd.activate_block.vpvc);
- fore200e->bus->write(*(u32*)&activ_opcode, (u32*)&entry->cp_entry->cmd.activate_block.opcode);
+ fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.vpvc);
+ fore200e->bus->write(*(u32*)&activ_opcode, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.opcode);
}
else {
- fore200e->bus->write(*(u32*)&vpvc, (u32*)&entry->cp_entry->cmd.deactivate_block.vpvc);
- fore200e->bus->write(*(u32*)&deactiv_opcode, (u32*)&entry->cp_entry->cmd.deactivate_block.opcode);
+ fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.vpvc);
+ fore200e->bus->write(*(u32*)&deactiv_opcode, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.opcode);
}
ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
vcc->itf = vcc->vci = vcc->vpi = 0;
fore200e_vcc = FORE200E_VCC(vcc);
- FORE200E_VCC(vcc) = NULL;
+ vcc->dev_data = NULL;
spin_unlock_irqrestore(&fore200e->q_lock, flags);
/* retry once again? */
if (--retry > 0) {
- schedule();
+ udelay(50);
goto retry_here;
}
entry->data = tx_copy ? data : NULL;
tpd = entry->tpd;
- tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, data, tx_len, FORE200E_DMA_TODEVICE);
+ tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, data, tx_len, DMA_TO_DEVICE);
tpd->tsd[ 0 ].length = tx_len;
FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX);
tpd_haddr.haddr = entry->tpd_dma >> TPD_HADDR_SHIFT; /* shift the address, as we are in a bitfield */
*entry->status = STATUS_PENDING;
- fore200e->bus->write(*(u32*)&tpd_haddr, (u32*)&entry->cp_entry->tpd_haddr);
+ fore200e->bus->write(*(u32*)&tpd_haddr, (u32 __iomem *)&entry->cp_entry->tpd_haddr);
spin_unlock_irqrestore(&fore200e->q_lock, flags);
}
stats_dma_addr = fore200e->bus->dma_map(fore200e, fore200e->stats,
- sizeof(struct stats), FORE200E_DMA_FROMDEVICE);
+ sizeof(struct stats), DMA_FROM_DEVICE);
FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
*entry->status = STATUS_PENDING;
- fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.stats_block.opcode);
+ fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.stats_block.opcode);
ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
*entry->status = STATUS_FREE;
- fore200e->bus->dma_unmap(fore200e, stats_dma_addr, sizeof(struct stats), FORE200E_DMA_FROMDEVICE);
+ fore200e->bus->dma_unmap(fore200e, stats_dma_addr, sizeof(struct stats), DMA_FROM_DEVICE);
if (ok == 0) {
printk(FORE200E "unable to get statistics from device %s\n", fore200e->name);
static int
-fore200e_getsockopt(struct atm_vcc* vcc, int level, int optname, void* optval, int optlen)
+fore200e_getsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, int optlen)
{
/* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */
static int
-fore200e_setsockopt(struct atm_vcc* vcc, int level, int optname, void* optval, int optlen)
+fore200e_setsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, int optlen)
{
/* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */
int ok;
u32 oc3_regs_dma_addr;
- oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), FORE200E_DMA_FROMDEVICE);
+ oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
*entry->status = STATUS_FREE;
- fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), FORE200E_DMA_FROMDEVICE);
+ fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
if (ok == 0) {
printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name);
*entry->status = STATUS_PENDING;
- fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
+ fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.oc3_block.opcode);
ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
static int
-fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats* arg)
+fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats __user *arg)
{
struct sonet_stats tmp;
static int
-fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void* arg)
+fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void __user * arg)
{
struct fore200e* fore200e = FORE200E_DEV(dev);
switch (cmd) {
case SONET_GETSTAT:
- return fore200e_fetch_stats(fore200e, (struct sonet_stats*)arg);
+ return fore200e_fetch_stats(fore200e, (struct sonet_stats __user *)arg);
case SONET_GETDIAG:
- return put_user(0, (int*)arg) ? -EFAULT : 0;
+ return put_user(0, (int __user *)arg) ? -EFAULT : 0;
case ATM_SETLOOP:
return fore200e_setloop(fore200e, (int)(unsigned long)arg);
case ATM_GETLOOP:
- return put_user(fore200e->loop_mode, (int*)arg) ? -EFAULT : 0;
+ return put_user(fore200e->loop_mode, (int __user *)arg) ? -EFAULT : 0;
case ATM_QUERYLOOP:
- return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int*)arg) ? -EFAULT : 0;
+ return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int __user *)arg) ? -EFAULT : 0;
}
return -ENOSYS; /* not implemented */
/* allocate the receive buffer body */
if (fore200e_chunk_alloc(fore200e,
&buffer[ i ].data, size, fore200e->bus->buffer_alignment,
- FORE200E_DMA_FROMDEVICE) < 0) {
+ DMA_FROM_DEVICE) < 0) {
while (i > 0)
fore200e_chunk_free(fore200e, &buffer[ --i ].data);
int scheme, magn, i;
struct host_bsq* bsq;
- struct cp_bsq_entry* cp_entry;
+ struct cp_bsq_entry __iomem * cp_entry;
for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
}
/* get the base address of the cp resident buffer supply queue entries */
- cp_entry = (struct cp_bsq_entry*)(fore200e->virt_base +
- fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]));
+ cp_entry = fore200e->virt_base +
+ fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]);
/* fill the host resident and cp resident buffer supply queue entries */
for (i = 0; i < QUEUE_SIZE_BS; i++) {
fore200e_init_rx_queue(struct fore200e* fore200e)
{
struct host_rxq* rxq = &fore200e->host_rxq;
- struct cp_rxq_entry* cp_entry;
+ struct cp_rxq_entry __iomem * cp_entry;
int i;
DPRINTK(2, "receive queue is being initialized\n");
}
/* get the base address of the cp resident rx queue entries */
- cp_entry = (struct cp_rxq_entry*)(fore200e->virt_base +
- fore200e->bus->read(&fore200e->cp_queues->cp_rxq));
+ cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_rxq);
/* fill the host resident and cp resident rx entries */
for (i=0; i < QUEUE_SIZE_RX; i++) {
fore200e_init_tx_queue(struct fore200e* fore200e)
{
struct host_txq* txq = &fore200e->host_txq;
- struct cp_txq_entry* cp_entry;
+ struct cp_txq_entry __iomem * cp_entry;
int i;
DPRINTK(2, "transmit queue is being initialized\n");
}
/* get the base address of the cp resident tx queue entries */
- cp_entry = (struct cp_txq_entry*)(fore200e->virt_base +
- fore200e->bus->read(&fore200e->cp_queues->cp_txq));
+ cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_txq);
/* fill the host resident and cp resident tx entries */
for (i=0; i < QUEUE_SIZE_TX; i++) {
fore200e_init_cmd_queue(struct fore200e* fore200e)
{
struct host_cmdq* cmdq = &fore200e->host_cmdq;
- struct cp_cmdq_entry* cp_entry;
+ struct cp_cmdq_entry __iomem * cp_entry;
int i;
DPRINTK(2, "command queue is being initialized\n");
}
/* get the base address of the cp resident cmd queue entries */
- cp_entry = (struct cp_cmdq_entry*)(fore200e->virt_base +
- fore200e->bus->read(&fore200e->cp_queues->cp_cmdq));
+ cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_cmdq);
/* fill the host resident and cp resident cmd entries */
for (i=0; i < QUEUE_SIZE_CMD; i++) {
enum buffer_scheme scheme, enum buffer_magn magn,
int queue_length, int pool_size, int supply_blksize)
{
- struct bs_spec* bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ];
+ struct bs_spec __iomem * bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ];
fore200e->bus->write(queue_length, &bs_spec->queue_length);
fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size);
static int __init
fore200e_initialize(struct fore200e* fore200e)
{
- struct cp_queues* cpq;
+ struct cp_queues __iomem * cpq;
int ok, scheme, magn;
DPRINTK(2, "device %s being initialized\n", fore200e->name);
init_MUTEX(&fore200e->rate_sf);
spin_lock_init(&fore200e->q_lock);
- cpq = fore200e->cp_queues = (struct cp_queues*) (fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET);
+ cpq = fore200e->cp_queues = fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET;
/* enable cp to host interrupts */
fore200e->bus->write(1, &cpq->imask);
static void __init
fore200e_monitor_putc(struct fore200e* fore200e, char c)
{
- struct cp_monitor* monitor = fore200e->cp_monitor;
+ struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
#if 0
printk("%c", c);
static int __init
fore200e_monitor_getc(struct fore200e* fore200e)
{
- struct cp_monitor* monitor = fore200e->cp_monitor;
+ struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
unsigned long timeout = jiffies + MSECS(50);
int c;
struct fw_header* fw_header = (struct fw_header*) fw_data;
- u32* load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
+ u32 __iomem *load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
fore200e->name, load_addr, fw_size);
" board serial number:\t\t%d\n\n",
fore200e_irq_itoa(fore200e->irq),
(void*)fore200e->phys_base,
- (void*)fore200e->virt_base,
+ fore200e->virt_base,
fore200e->esi[0], fore200e->esi[1], fore200e->esi[2],
fore200e->esi[3], fore200e->esi[4], fore200e->esi[5],
fore200e->esi[4] * 256 + fore200e->esi[5]);
}
if (!left--) {
- struct cp_monitor* cp_monitor = fore200e->cp_monitor;
+ struct cp_monitor __iomem * cp_monitor = fore200e->cp_monitor;
return sprintf(page,
"\n\n"
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