static struct _intel_i810_private {
struct pci_dev *i810_dev; /* device one */
- volatile u8 *registers;
+ volatile u8 __iomem *registers;
int num_dcache_entries;
} intel_i810_private;
pci_read_config_dword(intel_i810_private.i810_dev, I810_MMADDR, &temp);
temp &= 0xfff80000;
- intel_i810_private.registers = (volatile u8 *) ioremap(temp, 128 * 4096);
+ intel_i810_private.registers = ioremap(temp, 128 * 4096);
if (!intel_i810_private.registers) {
printk(KERN_ERR PFX "Unable to remap memory.\n");
return -ENOMEM;
static void intel_i810_cleanup(void)
{
OUTREG32(intel_i810_private.registers, I810_PGETBL_CTL, 0);
- iounmap((void *) intel_i810_private.registers);
+ iounmap(intel_i810_private.registers);
}
static void intel_i810_tlbflush(struct agp_memory *mem)
page = alloc_pages(GFP_KERNEL, 2);
if (page == NULL) {
- return 0;
+ return NULL;
}
if (change_page_attr(page, 4, PAGE_KERNEL_NOCACHE) < 0) {
- __free_page(page);
- return 0;
+ __free_page(page);
+ return NULL;
}
get_page(page);
SetPageLocked(page);
if (addr == NULL)
return;
-
+
page = virt_to_page(addr);
change_page_attr(page, 4, PAGE_KERNEL);
put_page(page);
return -EINVAL;
}
for (j = pg_start; j < (pg_start + mem->page_count); j++) {
- if (!PGE_EMPTY(agp_bridge, agp_bridge->gatt_table[j]))
+ if (!PGE_EMPTY(agp_bridge, readl(agp_bridge->gatt_table+j)))
return -EBUSY;
}
if (curr->page_count == 4)
i8xx_destroy_pages(phys_to_virt(curr->memory[0]));
else
- agp_bridge->driver->agp_destroy_page(
+ agp_bridge->driver->agp_destroy_page(
phys_to_virt(curr->memory[0]));
vfree(curr->memory);
}
static struct _intel_i830_private {
struct pci_dev *i830_dev; /* device one */
- volatile u8 *registers;
- volatile u32 *gtt; /* I915G */
+ volatile u8 __iomem *registers;
+ volatile u32 __iomem *gtt; /* I915G */
int gtt_entries;
} intel_i830_private;
/* We obtain the size of the GTT, which is also stored (for some
* reason) at the top of stolen memory. Then we add 4KB to that
- * for the video BIOS popup, which is also stored in there. */
+ * for the video BIOS popup, which is also stored in there. */
size = agp_bridge->driver->fetch_size() + 4;
if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82830_HB ||
pci_read_config_dword(intel_i830_private.i830_dev,I810_MMADDR,&temp);
temp &= 0xfff80000;
- intel_i830_private.registers = (volatile u8 *) ioremap(temp,128 * 4096);
+ intel_i830_private.registers = ioremap(temp,128 * 4096);
if (!intel_i830_private.registers)
return (-ENOMEM);
static void intel_i830_cleanup(void)
{
- iounmap((void *) intel_i830_private.registers);
+ iounmap(intel_i830_private.registers);
}
static int intel_i830_insert_entries(struct agp_memory *mem,off_t pg_start,
static void intel_i915_cleanup(void)
{
- iounmap((void *) intel_i830_private.gtt);
- iounmap((void *) intel_i830_private.registers);
+ iounmap(intel_i830_private.gtt);
+ iounmap(intel_i830_private.registers);
}
static int intel_i915_insert_entries(struct agp_memory *mem,off_t pg_start,
size = agp_bridge->current_size;
page_order = size->page_order;
num_entries = size->num_entries;
- agp_bridge->gatt_table_real = 0;
+ agp_bridge->gatt_table_real = NULL;
pci_read_config_dword(intel_i830_private.i830_dev, I915_MMADDR, &temp);
pci_read_config_dword(intel_i830_private.i830_dev, I915_PTEADDR,&temp2);
- intel_i830_private.gtt = (volatile u32 *) ioremap(temp2, 256 * 1024);
- if (!intel_i830_private.gtt)
+ intel_i830_private.gtt = ioremap(temp2, 256 * 1024);
+ if (!intel_i830_private.gtt)
return (-ENOMEM);
temp &= 0xfff80000;
- intel_i830_private.registers = (volatile u8 *) ioremap(temp,128 * 4096);
+ intel_i830_private.registers = ioremap(temp,128 * 4096);
if (!intel_i830_private.registers)
return (-ENOMEM);
/* aperture size */
pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
- current_size->size_value);
+ current_size->size_value);
/* address to map to */
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, addr);
/* agpctrl */
- pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
+ pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
/* apcont */
pci_read_config_byte(agp_bridge->dev, INTEL_815_APCONT, &temp2);
previous_size = A_SIZE_8(agp_bridge->previous_size);
pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp);
- pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR,
+ pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR,
temp & ~(1 << 1));
pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
previous_size->size_value);
static int intel_820_configure(void)
{
u32 temp;
- u8 temp2;
+ u8 temp2;
struct aper_size_info_8 *current_size;
current_size = A_SIZE_8(agp_bridge->current_size);
/* aperture size */
- pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
+ pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
/* address to map to */
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
/* attbase - aperture base */
- pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
+ pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
/* agpctrl */
- pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
+ pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
/* global enable aperture access */
/* This flag is not accessed through MCHCFG register as in */
pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp2);
pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR, temp2 | (1 << 1));
/* clear any possible AGP-related error conditions */
- pci_write_config_word(agp_bridge->dev, INTEL_I820_ERRSTS, 0x001c);
+ pci_write_config_word(agp_bridge->dev, INTEL_I820_ERRSTS, 0x001c);
return 0;
}
current_size = A_SIZE_8(agp_bridge->current_size);
/* aperture size */
- pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
+ pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
/* address to map to */
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
/* attbase - aperture base */
- pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
+ pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
/* agpctrl */
- pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
+ pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
/* mcgcfg */
pci_read_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, &temp2);
pci_write_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, temp2 | (1 << 9));
/* clear any possible error conditions */
- pci_write_config_word(agp_bridge->dev, INTEL_I840_ERRSTS, 0xc000);
+ pci_write_config_word(agp_bridge->dev, INTEL_I840_ERRSTS, 0xc000);
return 0;
}
current_size = A_SIZE_8(agp_bridge->current_size);
/* aperture size */
- pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
+ pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
/* address to map to */
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
/* attbase - aperture base */
- pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
+ pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
/* agpctrl */
- pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
+ pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
/* agpm */
pci_read_config_byte(agp_bridge->dev, INTEL_I845_AGPM, &temp2);
pci_write_config_byte(agp_bridge->dev, INTEL_I845_AGPM, temp2 | (1 << 1));
/* clear any possible error conditions */
- pci_write_config_word(agp_bridge->dev, INTEL_I845_ERRSTS, 0x001c);
+ pci_write_config_word(agp_bridge->dev, INTEL_I845_ERRSTS, 0x001c);
return 0;
}
current_size = A_SIZE_8(agp_bridge->current_size);
/* aperture size */
- pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
+ pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
/* address to map to */
pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
/* attbase - aperture base */
- pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
+ pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
/* agpctrl */
- pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
+ pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
/* mcgcfg */
pci_read_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, &temp2);
pci_write_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, temp2 | (1 << 9));
/* clear any possible AGP-related error conditions */
- pci_write_config_word(agp_bridge->dev, INTEL_I850_ERRSTS, 0x001c);
+ pci_write_config_word(agp_bridge->dev, INTEL_I850_ERRSTS, 0x001c);
return 0;
}
/* mchcfg */
pci_read_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, &temp2);
pci_write_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, temp2 | (1 << 9));
-
+
return 0;
}
{64, 16384, 4, 0},
{32, 8192, 3, 8},
};
-
+
static struct aper_size_info_8 intel_8xx_sizes[7] =
{
{256, 65536, 6, 0},
{4, 1024, 0, 63}
};
-static struct aper_size_info_8 intel_830mp_sizes[4] =
+static struct aper_size_info_8 intel_830mp_sizes[4] =
{
{256, 65536, 6, 0},
{128, 32768, 5, 32},
.owner = THIS_MODULE,
.aperture_sizes = intel_i830_sizes,
.size_type = FIXED_APER_SIZE,
- .num_aperture_sizes = 3,
+ .num_aperture_sizes = 3,
.needs_scratch_page = TRUE,
.configure = intel_i830_configure,
.fetch_size = intel_i830_fetch_size,
.owner = THIS_MODULE,
.aperture_sizes = intel_i830_sizes,
.size_type = FIXED_APER_SIZE,
- .num_aperture_sizes = 3,
+ .num_aperture_sizes = 3,
.needs_scratch_page = TRUE,
.configure = intel_i915_configure,
.fetch_size = intel_i915_fetch_size,
.agp_destroy_page = agp_generic_destroy_page,
};
-static int find_i810(u16 device, const char *name)
+static int find_i810(u16 device)
{
struct pci_dev *i810_dev;
i810_dev = pci_find_device(PCI_VENDOR_ID_INTEL, device, NULL);
- if (!i810_dev) {
- printk(KERN_ERR PFX "Detected an Intel %s Chipset, "
- "but could not find the secondary device.\n",
- name);
+ if (!i810_dev)
return 0;
- }
-
intel_i810_private.i810_dev = i810_dev;
return 1;
}
name = "440GX";
break;
case PCI_DEVICE_ID_INTEL_82810_MC1:
- if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG1, "i810"))
+ name = "i810";
+ if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG1))
goto fail;
bridge->driver = &intel_810_driver;
- name = "i810";
break;
case PCI_DEVICE_ID_INTEL_82810_MC3:
- if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG3, "i810 DC100"))
+ name = "i810 DC100";
+ if (!find_i810(PCI_DEVICE_ID_INTEL_82810_IG3))
goto fail;
bridge->driver = &intel_810_driver;
- name = "i810 DC100";
break;
case PCI_DEVICE_ID_INTEL_82810E_MC:
- if (!find_i810(PCI_DEVICE_ID_INTEL_82810E_IG, "i810 E"))
+ name = "i810 E";
+ if (!find_i810(PCI_DEVICE_ID_INTEL_82810E_IG))
goto fail;
bridge->driver = &intel_810_driver;
- name = "i810 E";
break;
case PCI_DEVICE_ID_INTEL_82815_MC:
/*
* The i815 can operate either as an i810 style
* integrated device, or as an AGP4X motherboard.
*/
- if (find_i810(PCI_DEVICE_ID_INTEL_82815_CGC, "i815"))
+ if (find_i810(PCI_DEVICE_ID_INTEL_82815_CGC))
bridge->driver = &intel_810_driver;
else
bridge->driver = &intel_815_driver;
pci_set_drvdata(pdev, bridge);
return agp_add_bridge(bridge);
- fail:
+
+fail:
+ printk(KERN_ERR PFX "Detected an Intel %s chipset, "
+ "but could not find the secondary device.\n", name);
agp_put_bridge(bridge);
return -ENODEV;
}
static int agp_intel_resume(struct pci_dev *pdev)
{
struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
-
+
pci_restore_state(pdev, pdev->saved_config_space);
if (bridge->driver == &intel_generic_driver)
static struct pci_device_id agp_intel_pci_table[] = {
#define ID(x) \
- { \
+ { \
.class = (PCI_CLASS_BRIDGE_HOST << 8), \
.class_mask = ~0, \
.vendor = PCI_VENDOR_ID_INTEL, \
ID(PCI_DEVICE_ID_INTEL_82865_HB),
ID(PCI_DEVICE_ID_INTEL_82875_HB),
ID(PCI_DEVICE_ID_INTEL_7505_0),
- ID(PCI_DEVICE_ID_INTEL_7205_0),
+ ID(PCI_DEVICE_ID_INTEL_7205_0),
+ ID(PCI_DEVICE_ID_INTEL_82915G_HB),
{ }
};
.name = "agpgart-intel",
.id_table = agp_intel_pci_table,
.probe = agp_intel_probe,
- .remove = agp_intel_remove,
+ .remove = __devexit_p(agp_intel_remove),
.resume = agp_intel_resume,
};