#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+#include <linux/jiffies.h>
#include <linux/agp_backend.h>
#include "agp.h"
struct serverworks_page_map {
unsigned long *real;
- unsigned long *remapped;
+ unsigned long __iomem *remapped;
};
static struct _serverworks_private {
struct pci_dev *svrwrks_dev; /* device one */
- volatile u8 *registers;
+ volatile u8 __iomem *registers;
struct serverworks_page_map **gatt_pages;
int num_tables;
struct serverworks_page_map scratch_dir;
}
SetPageReserved(virt_to_page(page_map->real));
global_cache_flush();
- page_map->remapped = ioremap_nocache(virt_to_phys(page_map->real),
+ page_map->remapped = ioremap_nocache(virt_to_gart(page_map->real),
PAGE_SIZE);
if (page_map->remapped == NULL) {
ClearPageReserved(virt_to_page(page_map->real));
}
global_cache_flush();
- for(i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++) {
- page_map->remapped[i] = agp_bridge->scratch_page;
- }
+ for (i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++)
+ writel(agp_bridge->scratch_page, page_map->remapped+i);
return 0;
}
struct serverworks_page_map *entry;
tables = serverworks_private.gatt_pages;
- for(i = 0; i < serverworks_private.num_tables; i++) {
+ for (i = 0; i < serverworks_private.num_tables; i++) {
entry = tables[i];
if (entry != NULL) {
if (entry->real != NULL) {
int retval = 0;
int i;
- tables = kmalloc((nr_tables + 1) * sizeof(struct serverworks_page_map *),
+ tables = kzalloc((nr_tables + 1) * sizeof(struct serverworks_page_map *),
GFP_KERNEL);
- if (tables == NULL) {
+ if (tables == NULL)
return -ENOMEM;
- }
- memset(tables, 0, sizeof(struct serverworks_page_map *) * (nr_tables + 1));
+
for (i = 0; i < nr_tables; i++) {
- entry = kmalloc(sizeof(struct serverworks_page_map), GFP_KERNEL);
+ entry = kzalloc(sizeof(struct serverworks_page_map), GFP_KERNEL);
if (entry == NULL) {
retval = -ENOMEM;
break;
}
- memset(entry, 0, sizeof(struct serverworks_page_map));
tables[i] = entry;
retval = serverworks_create_page_map(entry);
if (retval != 0) break;
#define GET_GATT_OFF(addr) ((addr & 0x003ff000) >> 12)
#endif
-static int serverworks_create_gatt_table(void)
+static int serverworks_create_gatt_table(struct agp_bridge_data *bridge)
{
struct aper_size_info_lvl2 *value;
struct serverworks_page_map page_dir;
return retval;
}
/* Create a fake scratch directory */
- for(i = 0; i < 1024; i++) {
- serverworks_private.scratch_dir.remapped[i] = (unsigned long) agp_bridge->scratch_page;
- page_dir.remapped[i] =
- virt_to_phys(serverworks_private.scratch_dir.real);
- page_dir.remapped[i] |= 0x00000001;
+ for (i = 0; i < 1024; i++) {
+ writel(agp_bridge->scratch_page, serverworks_private.scratch_dir.remapped+i);
+ writel(virt_to_gart(serverworks_private.scratch_dir.real) | 1, page_dir.remapped+i);
}
retval = serverworks_create_gatt_pages(value->num_entries / 1024);
}
agp_bridge->gatt_table_real = (u32 *)page_dir.real;
- agp_bridge->gatt_table = (u32 *)page_dir.remapped;
- agp_bridge->gatt_bus_addr = virt_to_phys(page_dir.real);
+ agp_bridge->gatt_table = (u32 __iomem *)page_dir.remapped;
+ agp_bridge->gatt_bus_addr = virt_to_gart(page_dir.real);
/* Get the address for the gart region.
* This is a bus address even on the alpha, b/c its
pci_read_config_dword(agp_bridge->dev,serverworks_private.gart_addr_ofs,&temp);
agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
- /* Calculate the agp offset */
-
- for(i = 0; i < value->num_entries / 1024; i++) {
- page_dir.remapped[i] =
- virt_to_phys(serverworks_private.gatt_pages[i]->real);
- page_dir.remapped[i] |= 0x00000001;
- }
+ /* Calculate the agp offset */
+ for (i = 0; i < value->num_entries / 1024; i++)
+ writel(virt_to_gart(serverworks_private.gatt_pages[i]->real)|1, page_dir.remapped+i);
return 0;
}
-static int serverworks_free_gatt_table(void)
+static int serverworks_free_gatt_table(struct agp_bridge_data *bridge)
{
struct serverworks_page_map page_dir;
-
+
page_dir.real = (unsigned long *)agp_bridge->gatt_table_real;
- page_dir.remapped = (unsigned long *)agp_bridge->gatt_table;
+ page_dir.remapped = (unsigned long __iomem *)agp_bridge->gatt_table;
serverworks_free_gatt_pages();
serverworks_free_page_map(&page_dir);
*/
static void serverworks_tlbflush(struct agp_memory *temp)
{
- OUTREG8(serverworks_private.registers, SVWRKS_POSTFLUSH, 1);
- while(INREG8(serverworks_private.registers, SVWRKS_POSTFLUSH) == 1)
+ unsigned long timeout;
+
+ writeb(1, serverworks_private.registers+SVWRKS_POSTFLUSH);
+ timeout = jiffies + 3*HZ;
+ while (readb(serverworks_private.registers+SVWRKS_POSTFLUSH) == 1) {
cpu_relax();
+ if (time_after(jiffies, timeout)) {
+ printk(KERN_ERR PFX "TLB post flush took more than 3 seconds\n");
+ break;
+ }
+ }
- OUTREG32(serverworks_private.registers, SVWRKS_DIRFLUSH, 1);
- while(INREG32(serverworks_private.registers, SVWRKS_DIRFLUSH) == 1)
+ writel(1, serverworks_private.registers+SVWRKS_DIRFLUSH);
+ timeout = jiffies + 3*HZ;
+ while (readl(serverworks_private.registers+SVWRKS_DIRFLUSH) == 1) {
cpu_relax();
+ if (time_after(jiffies, timeout)) {
+ printk(KERN_ERR PFX "TLB Dir flush took more than 3 seconds\n");
+ break;
+ }
+ }
}
static int serverworks_configure(void)
/* Get the memory mapped registers */
pci_read_config_dword(agp_bridge->dev, serverworks_private.mm_addr_ofs, &temp);
temp = (temp & PCI_BASE_ADDRESS_MEM_MASK);
- serverworks_private.registers = (volatile u8 *) ioremap(temp, 4096);
+ serverworks_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096);
if (!serverworks_private.registers) {
printk (KERN_ERR PFX "Unable to ioremap() memory.\n");
return -ENOMEM;
}
- OUTREG8(serverworks_private.registers, SVWRKS_GART_CACHE, 0x0a);
+ writeb(0xA, serverworks_private.registers+SVWRKS_GART_CACHE);
+ readb(serverworks_private.registers+SVWRKS_GART_CACHE); /* PCI Posting. */
- OUTREG32(serverworks_private.registers, SVWRKS_GATTBASE,
- agp_bridge->gatt_bus_addr);
+ writel(agp_bridge->gatt_bus_addr, serverworks_private.registers+SVWRKS_GATTBASE);
+ readl(serverworks_private.registers+SVWRKS_GATTBASE); /* PCI Posting. */
- cap_reg = INREG16(serverworks_private.registers, SVWRKS_COMMAND);
+ cap_reg = readw(serverworks_private.registers+SVWRKS_COMMAND);
cap_reg &= ~0x0007;
cap_reg |= 0x4;
- OUTREG16(serverworks_private.registers, SVWRKS_COMMAND, cap_reg);
+ writew(cap_reg, serverworks_private.registers+SVWRKS_COMMAND);
+ readw(serverworks_private.registers+SVWRKS_COMMAND);
- pci_read_config_byte(serverworks_private.svrwrks_dev,
- SVWRKS_AGP_ENABLE, &enable_reg);
+ pci_read_config_byte(serverworks_private.svrwrks_dev,SVWRKS_AGP_ENABLE, &enable_reg);
enable_reg |= 0x1; /* Agp Enable bit */
- pci_write_config_byte(serverworks_private.svrwrks_dev,
- SVWRKS_AGP_ENABLE, enable_reg);
+ pci_write_config_byte(serverworks_private.svrwrks_dev,SVWRKS_AGP_ENABLE, enable_reg);
serverworks_tlbflush(NULL);
agp_bridge->capndx = pci_find_capability(serverworks_private.svrwrks_dev, PCI_CAP_ID_AGP);
static void serverworks_cleanup(void)
{
- iounmap((void *) serverworks_private.registers);
+ iounmap((void __iomem *) serverworks_private.registers);
}
static int serverworks_insert_memory(struct agp_memory *mem,
off_t pg_start, int type)
{
int i, j, num_entries;
- unsigned long *cur_gatt;
+ unsigned long __iomem *cur_gatt;
unsigned long addr;
num_entries = A_SIZE_LVL2(agp_bridge->current_size)->num_entries;
while (j < (pg_start + mem->page_count)) {
addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
cur_gatt = SVRWRKS_GET_GATT(addr);
- if (!PGE_EMPTY(agp_bridge, cur_gatt[GET_GATT_OFF(addr)])) {
+ if (!PGE_EMPTY(agp_bridge, readl(cur_gatt+GET_GATT_OFF(addr))))
return -EBUSY;
- }
j++;
}
for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr;
cur_gatt = SVRWRKS_GET_GATT(addr);
- cur_gatt[GET_GATT_OFF(addr)] =
- agp_bridge->driver->mask_memory(mem->memory[i], mem->type);
+ writel(agp_bridge->driver->mask_memory(agp_bridge, mem->memory[i], mem->type), cur_gatt+GET_GATT_OFF(addr));
}
serverworks_tlbflush(mem);
return 0;
int type)
{
int i;
- unsigned long *cur_gatt;
+ unsigned long __iomem *cur_gatt;
unsigned long addr;
if (type != 0 || mem->type != 0) {
for (i = pg_start; i < (mem->page_count + pg_start); i++) {
addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr;
cur_gatt = SVRWRKS_GET_GATT(addr);
- cur_gatt[GET_GATT_OFF(addr)] =
- (unsigned long) agp_bridge->scratch_page;
+ writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr));
}
serverworks_tlbflush(mem);
{32, 8192, 0xfe000000}
};
-static void serverworks_agp_enable(u32 mode)
+static void serverworks_agp_enable(struct agp_bridge_data *bridge, u32 mode)
{
u32 command;
pci_read_config_dword(serverworks_private.svrwrks_dev,
- agp_bridge->capndx + PCI_AGP_STATUS,
+ bridge->capndx + PCI_AGP_STATUS,
&command);
- command = agp_collect_device_status(mode, command);
+ command = agp_collect_device_status(bridge, mode, command);
command &= ~0x10; /* disable FW */
command &= ~0x08;
command |= 0x100;
pci_write_config_dword(serverworks_private.svrwrks_dev,
- agp_bridge->capndx + PCI_AGP_COMMAND,
+ bridge->capndx + PCI_AGP_COMMAND,
command);
agp_device_command(command, 0);
}
-struct agp_bridge_driver sworks_driver = {
+static struct agp_bridge_driver sworks_driver = {
.owner = THIS_MODULE,
.aperture_sizes = serverworks_sizes,
.size_type = LVL2_APER_SIZE,
struct agp_bridge_data *bridge;
struct pci_dev *bridge_dev;
u32 temp, temp2;
+ u8 cap_ptr = 0;
/* Everything is on func 1 here so we are hardcoding function one */
bridge_dev = pci_find_slot((unsigned int)pdev->bus->number,
return -ENODEV;
}
+ cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
+
switch (pdev->device) {
case 0x0006:
- /* ServerWorks CNB20HE
- Fail silently.*/
- printk (KERN_ERR PFX "Detected ServerWorks CNB20HE chipset: No AGP present.\n");
+ printk (KERN_ERR PFX "ServerWorks CNB20HE is unsupported due to lack of documentation.\n");
return -ENODEV;
case PCI_DEVICE_ID_SERVERWORKS_HE:
break;
default:
- printk(KERN_ERR PFX "Unsupported Serverworks chipset "
- "(device id: %04x)\n", pdev->device);
+ if (cap_ptr)
+ printk(KERN_ERR PFX "Unsupported Serverworks chipset "
+ "(device id: %04x)\n", pdev->device);
return -ENODEV;
}
serverworks_private.svrwrks_dev = bridge_dev;
serverworks_private.gart_addr_ofs = 0x10;
-
+
pci_read_config_dword(pdev, SVWRKS_APSIZE, &temp);
if (temp & PCI_BASE_ADDRESS_MEM_TYPE_64) {
pci_read_config_dword(pdev, SVWRKS_APSIZE + 4, &temp2);
static int __init agp_serverworks_init(void)
{
- return pci_module_init(&agp_serverworks_pci_driver);
+ if (agp_off)
+ return -EINVAL;
+ return pci_register_driver(&agp_serverworks_pci_driver);
}
static void __exit agp_serverworks_cleanup(void)
git://git.onelab.eu / linux-2.6.git / blobdiff