/*
- * VIA AGPGART routines.
+ * VIA AGPGART routines.
*/
#include <linux/types.h>
#include <linux/agp_backend.h>
#include "agp.h"
-static struct pci_device_id agp_via_pci_table[];
+static const struct pci_device_id agp_via_pci_table[];
#define VIA_GARTCTRL 0x80
#define VIA_APSIZE 0x84
return values[i].size;
}
}
+ printk(KERN_ERR PFX "Unknown aperture size from AGP bridge (0x%x)\n", temp);
return 0;
}
static void via_tlbflush(struct agp_memory *mem)
{
- pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, 0x0000008f);
- pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, 0x0000000f);
+ u32 temp;
+
+ pci_read_config_dword(agp_bridge->dev, VIA_GARTCTRL, &temp);
+ temp |= (1<<7);
+ pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, temp);
+ temp &= ~(1<<7);
+ pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, temp);
}
-static struct aper_size_info_8 via_generic_sizes[7] =
+static struct aper_size_info_8 via_generic_sizes[9] =
{
{256, 65536, 6, 0},
{128, 32768, 5, 128},
{32, 8192, 3, 224},
{16, 4096, 2, 240},
{8, 2048, 1, 248},
- {4, 1024, 0, 252}
+ {4, 1024, 0, 252},
+ {2, 512, 0, 254},
+ {1, 256, 0, 255}
};
{
u32 temp;
struct aper_size_info_16 *current_size;
-
+
current_size = A_SIZE_16(agp_bridge->current_size);
/* address to map too */
pci_write_config_dword(agp_bridge->dev, VIA_AGP3_ATTBASE,
agp_bridge->gatt_bus_addr & 0xfffff000);
- /* 1. Enable GTLB in RX90<7>, all AGP aperture access needs to fetch
+ /* 1. Enable GTLB in RX90<7>, all AGP aperture access needs to fetch
* translation table first.
* 2. Enable AGP aperture in RX91<0>. This bit controls the enabling of the
* graphics AGP aperture for the AGP3.0 port.
*/
pci_read_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, &temp);
- pci_write_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, temp | (3<<7));
+ pci_write_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, temp | (3<<7));
return 0;
}
}
-struct agp_bridge_driver via_agp3_driver = {
+static struct agp_bridge_driver via_agp3_driver = {
.owner = THIS_MODULE,
.aperture_sizes = agp3_generic_sizes,
.size_type = U8_APER_SIZE,
.agp_destroy_page = agp_generic_destroy_page,
};
-struct agp_bridge_driver via_driver = {
+static struct agp_bridge_driver via_driver = {
.owner = THIS_MODULE,
.aperture_sizes = via_generic_sizes,
.size_type = U8_APER_SIZE,
- .num_aperture_sizes = 7,
+ .num_aperture_sizes = 9,
.configure = via_configure,
.fetch_size = via_fetch_size,
.cleanup = via_cleanup,
.chipset_name = "PT880",
},
+ /* PT880 Ultra */
+ {
+ .device_id = PCI_DEVICE_ID_VIA_PT880ULTRA,
+ .chipset_name = "PT880 Ultra",
+ },
+
/* PT890 */
{
.device_id = PCI_DEVICE_ID_VIA_8783_0,
.device_id = PCI_DEVICE_ID_VIA_PX8X0_0,
.chipset_name = "PM800/PN800/PM880/PN880",
},
-
+ /* KT880 */
+ {
+ .device_id = PCI_DEVICE_ID_VIA_3269_0,
+ .chipset_name = "KT880",
+ },
+ /* KTxxx/Px8xx */
+ {
+ .device_id = PCI_DEVICE_ID_VIA_83_87XX_1,
+ .chipset_name = "VT83xx/VT87xx/KTxxx/Px8xx",
+ },
+ /* P4M800 */
+ {
+ .device_id = PCI_DEVICE_ID_VIA_3296_0,
+ .chipset_name = "P4M800",
+ },
+ /* P4M800CE */
+ {
+ .device_id = PCI_DEVICE_ID_VIA_P4M800CE,
+ .chipset_name = "VT3314",
+ },
+ /* CX700 */
+ {
+ .device_id = PCI_DEVICE_ID_VIA_CX700,
+ .chipset_name = "CX700",
+ },
+ /* VT3336 */
+ {
+ .device_id = PCI_DEVICE_ID_VIA_VT3336,
+ .chipset_name = "VT3336",
+ },
+ /* P4M890 */
+ {
+ .device_id = PCI_DEVICE_ID_VIA_P4M890,
+ .chipset_name = "P4M890",
+ },
{ }, /* dummy final entry, always present */
};
agp_put_bridge(bridge);
}
+#ifdef CONFIG_PM
+
+static int agp_via_suspend(struct pci_dev *pdev, pm_message_t state)
+{
+ pci_save_state (pdev);
+ pci_set_power_state (pdev, PCI_D3hot);
+
+ return 0;
+}
+
+static int agp_via_resume(struct pci_dev *pdev)
+{
+ struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
+
+ pci_set_power_state (pdev, PCI_D0);
+ pci_restore_state(pdev);
+
+ if (bridge->driver == &via_agp3_driver)
+ return via_configure_agp3();
+ else if (bridge->driver == &via_driver)
+ return via_configure();
+
+ return 0;
+}
+
+#endif /* CONFIG_PM */
+
/* must be the same order as name table above */
-static struct pci_device_id agp_via_pci_table[] = {
+static const struct pci_device_id agp_via_pci_table[] = {
#define ID(x) \
{ \
.class = (PCI_CLASS_BRIDGE_HOST << 8), \
.subvendor = PCI_ANY_ID, \
.subdevice = PCI_ANY_ID, \
}
+ ID(PCI_DEVICE_ID_VIA_82C597_0),
ID(PCI_DEVICE_ID_VIA_82C598_0),
ID(PCI_DEVICE_ID_VIA_8501_0),
ID(PCI_DEVICE_ID_VIA_8601_0),
ID(PCI_DEVICE_ID_VIA_8763_0),
ID(PCI_DEVICE_ID_VIA_8378_0),
ID(PCI_DEVICE_ID_VIA_PT880),
+ ID(PCI_DEVICE_ID_VIA_PT880ULTRA),
ID(PCI_DEVICE_ID_VIA_8783_0),
- ID(PCI_DEVICE_ID_VIA_PX8X0_0),
+ ID(PCI_DEVICE_ID_VIA_PX8X0_0),
+ ID(PCI_DEVICE_ID_VIA_3269_0),
+ ID(PCI_DEVICE_ID_VIA_83_87XX_1),
+ ID(PCI_DEVICE_ID_VIA_3296_0),
+ ID(PCI_DEVICE_ID_VIA_P4M800CE),
+ ID(PCI_DEVICE_ID_VIA_CX700),
+ ID(PCI_DEVICE_ID_VIA_VT3336),
+ ID(PCI_DEVICE_ID_VIA_P4M890),
{ }
};
.id_table = agp_via_pci_table,
.probe = agp_via_probe,
.remove = agp_via_remove,
+#ifdef CONFIG_PM
+ .suspend = agp_via_suspend,
+ .resume = agp_via_resume,
+#endif
};
static int __init agp_via_init(void)
{
- return pci_module_init(&agp_via_pci_driver);
+ if (agp_off)
+ return -EINVAL;
+ return pci_register_driver(&agp_via_pci_driver);
}
static void __exit agp_via_cleanup(void)
module_init(agp_via_init);
module_exit(agp_via_cleanup);
-MODULE_LICENSE("GPL and additional rights");
+MODULE_LICENSE("GPL");
MODULE_AUTHOR("Dave Jones <davej@codemonkey.org.uk>");