*/
#include <linux/module.h>
-#include <linux/config.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <asm/io.h>
-#include "aec62xx.h"
-
-#if 0
- if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) {
- (void) pci_read_config_byte(dev, 0x54, &art);
- p += sprintf(p, "DMA Mode: %s(%s)",
- (c0&0x20)?((art&0x03)?"UDMA":" DMA"):" PIO",
- (art&0x02)?"2":(art&0x01)?"1":"0");
- p += sprintf(p, " %s(%s)",
- (c0&0x40)?((art&0x0c)?"UDMA":" DMA"):" PIO",
- (art&0x08)?"2":(art&0x04)?"1":"0");
- p += sprintf(p, " %s(%s)",
- (c1&0x20)?((art&0x30)?"UDMA":" DMA"):" PIO",
- (art&0x20)?"2":(art&0x10)?"1":"0");
- p += sprintf(p, " %s(%s)\n",
- (c1&0x40)?((art&0xc0)?"UDMA":" DMA"):" PIO",
- (art&0x80)?"2":(art&0x40)?"1":"0");
- } else {
-#endif
+struct chipset_bus_clock_list_entry {
+ u8 xfer_speed;
+ u8 chipset_settings;
+ u8 ultra_settings;
+};
+
+static const struct chipset_bus_clock_list_entry aec6xxx_33_base [] = {
+ { XFER_UDMA_6, 0x31, 0x07 },
+ { XFER_UDMA_5, 0x31, 0x06 },
+ { XFER_UDMA_4, 0x31, 0x05 },
+ { XFER_UDMA_3, 0x31, 0x04 },
+ { XFER_UDMA_2, 0x31, 0x03 },
+ { XFER_UDMA_1, 0x31, 0x02 },
+ { XFER_UDMA_0, 0x31, 0x01 },
+
+ { XFER_MW_DMA_2, 0x31, 0x00 },
+ { XFER_MW_DMA_1, 0x31, 0x00 },
+ { XFER_MW_DMA_0, 0x0a, 0x00 },
+ { XFER_PIO_4, 0x31, 0x00 },
+ { XFER_PIO_3, 0x33, 0x00 },
+ { XFER_PIO_2, 0x08, 0x00 },
+ { XFER_PIO_1, 0x0a, 0x00 },
+ { XFER_PIO_0, 0x00, 0x00 },
+ { 0, 0x00, 0x00 }
+};
+
+static const struct chipset_bus_clock_list_entry aec6xxx_34_base [] = {
+ { XFER_UDMA_6, 0x41, 0x06 },
+ { XFER_UDMA_5, 0x41, 0x05 },
+ { XFER_UDMA_4, 0x41, 0x04 },
+ { XFER_UDMA_3, 0x41, 0x03 },
+ { XFER_UDMA_2, 0x41, 0x02 },
+ { XFER_UDMA_1, 0x41, 0x01 },
+ { XFER_UDMA_0, 0x41, 0x01 },
+
+ { XFER_MW_DMA_2, 0x41, 0x00 },
+ { XFER_MW_DMA_1, 0x42, 0x00 },
+ { XFER_MW_DMA_0, 0x7a, 0x00 },
+ { XFER_PIO_4, 0x41, 0x00 },
+ { XFER_PIO_3, 0x43, 0x00 },
+ { XFER_PIO_2, 0x78, 0x00 },
+ { XFER_PIO_1, 0x7a, 0x00 },
+ { XFER_PIO_0, 0x70, 0x00 },
+ { 0, 0x00, 0x00 }
+};
+
+#define BUSCLOCK(D) \
+ ((struct chipset_bus_clock_list_entry *) pci_get_drvdata((D)))
+
/*
* TO DO: active tuning and correction of cards without a bios.
switch(hwif->pci_dev->device) {
case PCI_DEVICE_ID_ARTOP_ATP865:
case PCI_DEVICE_ID_ARTOP_ATP865R:
-#if 0
- mode = (hwif->INB(hwif->dma_master) & 0x10) ? 4 : 3;
-#else
mode = (hwif->INB(((hwif->channel) ?
hwif->mate->dma_status :
hwif->dma_status)) & 0x10) ? 4 : 3;
-#endif
break;
case PCI_DEVICE_ID_ARTOP_ATP860:
case PCI_DEVICE_ID_ARTOP_ATP860R:
/* 0x40|(2*drive->dn): Active, 0x41|(2*drive->dn): Recovery */
pci_read_config_word(dev, 0x40|(2*drive->dn), &d_conf);
tmp0 = pci_bus_clock_list(speed, BUSCLOCK(dev));
- SPLIT_BYTE(tmp0,tmp1,tmp2);
- MAKE_WORD(d_conf,tmp1,tmp2);
+ d_conf = ((tmp0 & 0xf0) << 4) | (tmp0 & 0xf);
pci_write_config_word(dev, 0x40|(2*drive->dn), d_conf);
tmp1 = 0x00;
case PCI_DEVICE_ID_ARTOP_ATP865:
case PCI_DEVICE_ID_ARTOP_ATP865R:
printk(" AEC62XX time out ");
-#if 0
- {
- int i = 0;
- u8 reg49h = 0;
- pci_read_config_byte(HWIF(drive)->pci_dev, 0x49, ®49h);
- for (i=0;i<256;i++)
- pci_write_config_byte(HWIF(drive)->pci_dev, 0x49, reg49h|0x10);
- pci_write_config_byte(HWIF(drive)->pci_dev, 0x49, reg49h & ~0x10);
- }
- return 0;
-#endif
default:
break;
}
-#if 0
- {
- ide_hwif_t *hwif = HWIF(drive);
- struct pci_dev *dev = hwif->pci_dev;
- u8 tmp1 = 0, tmp2 = 0, mode6 = 0;
-
- pci_read_config_byte(dev, 0x44, &tmp1);
- pci_read_config_byte(dev, 0x45, &tmp2);
- printk(" AEC6280 r44=%x r45=%x ",tmp1,tmp2);
- mode6 = HWIF(drive)->INB(((hwif->channel) ?
- hwif->mate->dma_status :
- hwif->dma_status));
- printk(" AEC6280 133=%x ", (mode6 & 0x10));
- }
-#endif
return 0;
}
if (dev->resource[PCI_ROM_RESOURCE].start) {
pci_write_config_dword(dev, PCI_ROM_ADDRESS, dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
- printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", name, dev->resource[PCI_ROM_RESOURCE].start);
+ printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", name,
+ (unsigned long)dev->resource[PCI_ROM_RESOURCE].start);
}
if (bus_speed <= 33)
else
pci_set_drvdata(dev, (void *) aec6xxx_34_base);
+ /* These are necessary to get AEC6280 Macintosh cards to work */
+ if ((dev->device == PCI_DEVICE_ID_ARTOP_ATP865) ||
+ (dev->device == PCI_DEVICE_ID_ARTOP_ATP865R)) {
+ u8 reg49h = 0, reg4ah = 0;
+ /* Clear reset and test bits. */
+ pci_read_config_byte(dev, 0x49, ®49h);
+ pci_write_config_byte(dev, 0x49, reg49h & ~0x30);
+ /* Enable chip interrupt output. */
+ pci_read_config_byte(dev, 0x4a, ®4ah);
+ pci_write_config_byte(dev, 0x4a, reg4ah & ~0x01);
+ /* Enable burst mode. */
+ pci_read_config_byte(dev, 0x4a, ®4ah);
+ pci_write_config_byte(dev, 0x4a, reg4ah | 0x80);
+ }
+
return dev->irq;
}
ide_setup_dma(hwif, dmabase, 8);
}
-static void __devinit init_setup_aec62xx(struct pci_dev *dev, ide_pci_device_t *d)
+static int __devinit init_setup_aec62xx(struct pci_dev *dev, ide_pci_device_t *d)
{
- ide_setup_pci_device(dev, d);
+ return ide_setup_pci_device(dev, d);
}
-static void __devinit init_setup_aec6x80(struct pci_dev *dev, ide_pci_device_t *d)
+static int __devinit init_setup_aec6x80(struct pci_dev *dev, ide_pci_device_t *d)
{
unsigned long bar4reg = pci_resource_start(dev, 4);
strcpy(d->name, "AEC6280R");
}
- ide_setup_pci_device(dev, d);
+ return ide_setup_pci_device(dev, d);
}
+static ide_pci_device_t aec62xx_chipsets[] __devinitdata = {
+ { /* 0 */
+ .name = "AEC6210",
+ .init_setup = init_setup_aec62xx,
+ .init_chipset = init_chipset_aec62xx,
+ .init_hwif = init_hwif_aec62xx,
+ .init_dma = init_dma_aec62xx,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
+ .bootable = OFF_BOARD,
+ },{ /* 1 */
+ .name = "AEC6260",
+ .init_setup = init_setup_aec62xx,
+ .init_chipset = init_chipset_aec62xx,
+ .init_hwif = init_hwif_aec62xx,
+ .init_dma = init_dma_aec62xx,
+ .channels = 2,
+ .autodma = NOAUTODMA,
+ .bootable = OFF_BOARD,
+ },{ /* 2 */
+ .name = "AEC6260R",
+ .init_setup = init_setup_aec62xx,
+ .init_chipset = init_chipset_aec62xx,
+ .init_hwif = init_hwif_aec62xx,
+ .init_dma = init_dma_aec62xx,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
+ .bootable = NEVER_BOARD,
+ },{ /* 3 */
+ .name = "AEC6X80",
+ .init_setup = init_setup_aec6x80,
+ .init_chipset = init_chipset_aec62xx,
+ .init_hwif = init_hwif_aec62xx,
+ .init_dma = init_dma_aec62xx,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = OFF_BOARD,
+ },{ /* 4 */
+ .name = "AEC6X80R",
+ .init_setup = init_setup_aec6x80,
+ .init_chipset = init_chipset_aec62xx,
+ .init_hwif = init_hwif_aec62xx,
+ .init_dma = init_dma_aec62xx,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .enablebits = {{0x4a,0x02,0x02}, {0x4a,0x04,0x04}},
+ .bootable = OFF_BOARD,
+ }
+};
+
/**
* aec62xx_init_one - called when a AEC is found
* @dev: the aec62xx device
{
ide_pci_device_t *d = &aec62xx_chipsets[id->driver_data];
- d->init_setup(dev, d);
- return 0;
+ return d->init_setup(dev, d);
}
static struct pci_device_id aec62xx_pci_tbl[] = {
.probe = aec62xx_init_one,
};
-static int aec62xx_ide_init(void)
+static int __init aec62xx_ide_init(void)
{
return ide_pci_register_driver(&driver);
}
git://git.onelab.eu / linux-2.6.git / blobdiff