#include <asm/io.h>
#include <asm/irq.h>
-#include "pdc202xx_old.h"
+#define PDC202_DEBUG_CABLE 0
+#define PDC202XX_DEBUG_DRIVE_INFO 0
+
+static const char *pdc_quirk_drives[] = {
+ "QUANTUM FIREBALLlct08 08",
+ "QUANTUM FIREBALLP KA6.4",
+ "QUANTUM FIREBALLP KA9.1",
+ "QUANTUM FIREBALLP LM20.4",
+ "QUANTUM FIREBALLP KX13.6",
+ "QUANTUM FIREBALLP KX20.5",
+ "QUANTUM FIREBALLP KX27.3",
+ "QUANTUM FIREBALLP LM20.5",
+ NULL
+};
+
+/* A Register */
+#define SYNC_ERRDY_EN 0xC0
+
+#define SYNC_IN 0x80 /* control bit, different for master vs. slave drives */
+#define ERRDY_EN 0x40 /* control bit, different for master vs. slave drives */
+#define IORDY_EN 0x20 /* PIO: IOREADY */
+#define PREFETCH_EN 0x10 /* PIO: PREFETCH */
+
+#define PA3 0x08 /* PIO"A" timing */
+#define PA2 0x04 /* PIO"A" timing */
+#define PA1 0x02 /* PIO"A" timing */
+#define PA0 0x01 /* PIO"A" timing */
+
+/* B Register */
+
+#define MB2 0x80 /* DMA"B" timing */
+#define MB1 0x40 /* DMA"B" timing */
+#define MB0 0x20 /* DMA"B" timing */
+
+#define PB4 0x10 /* PIO_FORCE 1:0 */
+
+#define PB3 0x08 /* PIO"B" timing */ /* PIO flow Control mode */
+#define PB2 0x04 /* PIO"B" timing */ /* PIO 4 */
+#define PB1 0x02 /* PIO"B" timing */ /* PIO 3 half */
+#define PB0 0x01 /* PIO"B" timing */ /* PIO 3 other half */
-#define PDC202_DEBUG_CABLE 0
+/* C Register */
+#define IORDYp_NO_SPEED 0x4F
+#define SPEED_DIS 0x0F
+
+#define DMARQp 0x80
+#define IORDYp 0x40
+#define DMAR_EN 0x20
+#define DMAW_EN 0x10
+
+#define MC3 0x08 /* DMA"C" timing */
+#define MC2 0x04 /* DMA"C" timing */
+#define MC1 0x02 /* DMA"C" timing */
+#define MC0 0x01 /* DMA"C" timing */
#if 0
unsigned long bibma = pci_resource_start(dev, 4);
((sc1c & 0x02) == 0x02) ? "8" :
((sc1c & 0x01) == 0x01) ? "6" :
((sc1c & 0x00) == 0x00) ? "4" : "??");
- SPLIT_BYTE(sc1e, hi, lo);
+ hi = sc1e >> 4;
+ lo = sc1e & 0xf;
p += sprintf(p, "Status Polling Period : %d\n", hi);
p += sprintf(p, "Interrupt Check Status Polling Delay : %d\n", lo);
#endif
if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246) {
if (!(hwif->udma_four))
hwif->udma_four = (pdc202xx_old_cable_detect(hwif)) ? 0 : 1;
- hwif->ide_dma_start = &pdc202xx_old_ide_dma_start;
+ hwif->dma_start = &pdc202xx_old_ide_dma_start;
hwif->ide_dma_end = &pdc202xx_old_ide_dma_end;
}
hwif->ide_dma_test_irq = &pdc202xx_old_ide_dma_test_irq;
ide_setup_dma(hwif, dmabase, 8);
}
-static void __devinit init_setup_pdc202ata4(struct pci_dev *dev, ide_pci_device_t *d)
+static int __devinit init_setup_pdc202ata4(struct pci_dev *dev,
+ ide_pci_device_t *d)
{
if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE) {
u8 irq = 0, irq2 = 0;
}
#endif
- ide_setup_pci_device(dev, d);
+ return ide_setup_pci_device(dev, d);
}
-static void __devinit init_setup_pdc20265(struct pci_dev *dev, ide_pci_device_t *d)
+static int __devinit init_setup_pdc20265(struct pci_dev *dev,
+ ide_pci_device_t *d)
{
if ((dev->bus->self) &&
(dev->bus->self->vendor == PCI_VENDOR_ID_INTEL) &&
(dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960RM))) {
printk(KERN_INFO "ide: Skipping Promise PDC20265 "
"attached to I2O RAID controller.\n");
- return;
+ return -ENODEV;
}
#if 0
}
#endif
- ide_setup_pci_device(dev, d);
+ return ide_setup_pci_device(dev, d);
}
-static void __devinit init_setup_pdc202xx(struct pci_dev *dev, ide_pci_device_t *d)
+static int __devinit init_setup_pdc202xx(struct pci_dev *dev,
+ ide_pci_device_t *d)
{
- ide_setup_pci_device(dev, d);
+ return ide_setup_pci_device(dev, d);
}
+static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = {
+ { /* 0 */
+ .name = "PDC20246",
+ .init_setup = init_setup_pdc202ata4,
+ .init_chipset = init_chipset_pdc202xx,
+ .init_hwif = init_hwif_pdc202xx,
+ .init_dma = init_dma_pdc202xx,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = OFF_BOARD,
+ .extra = 16,
+ },{ /* 1 */
+ .name = "PDC20262",
+ .init_setup = init_setup_pdc202ata4,
+ .init_chipset = init_chipset_pdc202xx,
+ .init_hwif = init_hwif_pdc202xx,
+ .init_dma = init_dma_pdc202xx,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = OFF_BOARD,
+ .extra = 48,
+ .flags = IDEPCI_FLAG_FORCE_PDC,
+ },{ /* 2 */
+ .name = "PDC20263",
+ .init_setup = init_setup_pdc202ata4,
+ .init_chipset = init_chipset_pdc202xx,
+ .init_hwif = init_hwif_pdc202xx,
+ .init_dma = init_dma_pdc202xx,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = OFF_BOARD,
+ .extra = 48,
+ },{ /* 3 */
+ .name = "PDC20265",
+ .init_setup = init_setup_pdc20265,
+ .init_chipset = init_chipset_pdc202xx,
+ .init_hwif = init_hwif_pdc202xx,
+ .init_dma = init_dma_pdc202xx,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = OFF_BOARD,
+ .extra = 48,
+ .flags = IDEPCI_FLAG_FORCE_PDC,
+ },{ /* 4 */
+ .name = "PDC20267",
+ .init_setup = init_setup_pdc202xx,
+ .init_chipset = init_chipset_pdc202xx,
+ .init_hwif = init_hwif_pdc202xx,
+ .init_dma = init_dma_pdc202xx,
+ .channels = 2,
+ .autodma = AUTODMA,
+ .bootable = OFF_BOARD,
+ .extra = 48,
+ }
+};
+
/**
* pdc202xx_init_one - called when a PDC202xx is found
* @dev: the pdc202xx device
{
ide_pci_device_t *d = &pdc202xx_chipsets[id->driver_data];
- d->init_setup(dev, d);
- return 0;
+ return d->init_setup(dev, d);
}
static struct pci_device_id pdc202xx_pci_tbl[] = {