Revert to Fedora kernel-2.6.17-1.2187_FC5 patched with vs2.0.2.1; there are too many...
[linux-2.6.git] / drivers / ide / pci / piix.c
index 0b14b58..4d6ef95 100644 (file)
 
 #include <asm/io.h>
 
-#include "piix.h"
-
 static int no_piix_dma;
 
 /**
@@ -129,12 +127,15 @@ static u8 piix_ratemask (ide_drive_t *drive)
                case PCI_DEVICE_ID_INTEL_82801CA_10:
                case PCI_DEVICE_ID_INTEL_82801CA_11:
                case PCI_DEVICE_ID_INTEL_82801E_11:
+               case PCI_DEVICE_ID_INTEL_82801DB_1:
                case PCI_DEVICE_ID_INTEL_82801DB_10:
                case PCI_DEVICE_ID_INTEL_82801DB_11:
                case PCI_DEVICE_ID_INTEL_82801EB_11:
                case PCI_DEVICE_ID_INTEL_ESB_2:
                case PCI_DEVICE_ID_INTEL_ICH6_19:
                case PCI_DEVICE_ID_INTEL_ICH7_21:
+               case PCI_DEVICE_ID_INTEL_ESB2_18:
+               case PCI_DEVICE_ID_INTEL_ICH8_6:
                        mode = 3;
                        break;
                /* UDMA 66 capable */
@@ -203,6 +204,8 @@ static u8 piix_dma_2_pio (u8 xfer_rate) {
        }
 }
 
+static spinlock_t tune_lock = SPIN_LOCK_UNLOCKED;
+
 /**
  *     piix_tune_drive         -       tune a drive attached to a PIIX
  *     @drive: drive to tune
@@ -229,7 +232,12 @@ static void piix_tune_drive (ide_drive_t *drive, u8 pio)
                            { 2, 3 }, };
 
        pio = ide_get_best_pio_mode(drive, pio, 5, NULL);
-       spin_lock_irqsave(&ide_lock, flags);
+       
+       /* Master v slave is synchronized above us but the slave register is
+          shared by the two hwifs so the corner case of two slave timeouts in
+          parallel must be locked */
+          
+       spin_lock_irqsave(&tune_lock, flags);
        pci_read_config_word(dev, master_port, &master_data);
        if (is_slave) {
                master_data = master_data | 0x4000;
@@ -249,7 +257,7 @@ static void piix_tune_drive (ide_drive_t *drive, u8 pio)
        pci_write_config_word(dev, master_port, master_data);
        if (is_slave)
                pci_write_config_byte(dev, slave_port, slave_data);
-       spin_unlock_irqrestore(&ide_lock, flags);
+       spin_unlock_irqrestore(&tune_lock, flags);
 }
 
 /**
@@ -440,6 +448,7 @@ static unsigned int __devinit init_chipset_piix (struct pci_dev *dev, const char
                case PCI_DEVICE_ID_INTEL_82801BA_9:
                case PCI_DEVICE_ID_INTEL_82801CA_10:
                case PCI_DEVICE_ID_INTEL_82801CA_11:
+               case PCI_DEVICE_ID_INTEL_82801DB_1:
                case PCI_DEVICE_ID_INTEL_82801DB_10:
                case PCI_DEVICE_ID_INTEL_82801DB_11:
                case PCI_DEVICE_ID_INTEL_82801EB_11:
@@ -447,6 +456,8 @@ static unsigned int __devinit init_chipset_piix (struct pci_dev *dev, const char
                case PCI_DEVICE_ID_INTEL_ESB_2:
                case PCI_DEVICE_ID_INTEL_ICH6_19:
                case PCI_DEVICE_ID_INTEL_ICH7_21:
+               case PCI_DEVICE_ID_INTEL_ESB2_18:
+               case PCI_DEVICE_ID_INTEL_ICH8_6:
                {
                        unsigned int extra = 0;
                        pci_read_config_dword(dev, 0x54, &extra);
@@ -528,19 +539,53 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif)
        hwif->drives[0].autodma = hwif->autodma;
 }
 
-/**
- *     init_setup_piix         -       callback for IDE initialize
- *     @dev: PIIX PCI device
- *     @d: IDE pci info
- *
- *     Enable the xp fixup for the PIIX controller and then perform
- *     a standard ide PCI setup
- */
+#define DECLARE_PIIX_DEV(name_str) \
+       {                                               \
+               .name           = name_str,             \
+               .init_chipset   = init_chipset_piix,    \
+               .init_hwif      = init_hwif_piix,       \
+               .channels       = 2,                    \
+               .autodma        = AUTODMA,              \
+               .enablebits     = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, \
+               .bootable       = ON_BOARD,             \
+       }
 
-static void __devinit init_setup_piix(struct pci_dev *dev, ide_pci_device_t *d)
-{
-       ide_setup_pci_device(dev, d);
-}
+static ide_pci_device_t piix_pci_info[] __devinitdata = {
+       /*  0 */ DECLARE_PIIX_DEV("PIIXa"),
+       /*  1 */ DECLARE_PIIX_DEV("PIIXb"),
+
+       {       /* 2 */
+               .name           = "MPIIX",
+               .init_hwif      = init_hwif_piix,
+               .channels       = 2,
+               .autodma        = NODMA,
+               .enablebits     = {{0x6D,0x80,0x80}, {0x6F,0x80,0x80}},
+               .bootable       = ON_BOARD,
+       },
+
+       /*  3 */ DECLARE_PIIX_DEV("PIIX3"),
+       /*  4 */ DECLARE_PIIX_DEV("PIIX4"),
+       /*  5 */ DECLARE_PIIX_DEV("ICH0"),
+       /*  6 */ DECLARE_PIIX_DEV("PIIX4"),
+       /*  7 */ DECLARE_PIIX_DEV("ICH"),
+       /*  8 */ DECLARE_PIIX_DEV("PIIX4"),
+       /*  9 */ DECLARE_PIIX_DEV("PIIX4"),
+       /* 10 */ DECLARE_PIIX_DEV("ICH2"),
+       /* 11 */ DECLARE_PIIX_DEV("ICH2M"),
+       /* 12 */ DECLARE_PIIX_DEV("ICH3M"),
+       /* 13 */ DECLARE_PIIX_DEV("ICH3"),
+       /* 14 */ DECLARE_PIIX_DEV("ICH4"),
+       /* 15 */ DECLARE_PIIX_DEV("ICH5"),
+       /* 16 */ DECLARE_PIIX_DEV("C-ICH"),
+       /* 17 */ DECLARE_PIIX_DEV("ICH4"),
+       /* 18 */ DECLARE_PIIX_DEV("ICH5-SATA"),
+       /* 19 */ DECLARE_PIIX_DEV("ICH5"),
+       /* 20 */ DECLARE_PIIX_DEV("ICH6"),
+       /* 21 */ DECLARE_PIIX_DEV("ICH7"),
+       /* 22 */ DECLARE_PIIX_DEV("ICH4"),
+       /* 23 */ DECLARE_PIIX_DEV("ESB2"),
+       /* 24 */ DECLARE_PIIX_DEV("ICH8M"),
+};
 
 /**
  *     piix_init_one   -       called when a PIIX is found
@@ -555,8 +600,7 @@ static int __devinit piix_init_one(struct pci_dev *dev, const struct pci_device_
 {
        ide_pci_device_t *d = &piix_pci_info[id->driver_data];
 
-       d->init_setup(dev, d);
-       return 0;
+       return ide_setup_pci_device(dev, d);
 }
 
 /**
@@ -615,6 +659,9 @@ static struct pci_device_id piix_pci_tbl[] = {
        { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 19},
        { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_19, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 20},
        { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_21, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 21},
+       { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 22},
+       { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_18, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 23},
+       { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 24},
        { 0, },
 };
 MODULE_DEVICE_TABLE(pci, piix_pci_tbl);