{
case PCI_DEVICE_ID_SII_3112:
case PCI_DEVICE_ID_SII_1210SA:
+ case PCI_DEVICE_ID_ATI_IXP300_SATA:
+ case PCI_DEVICE_ID_ATI_IXP400_SATA:
return 1;
case PCI_DEVICE_ID_SII_680:
return 0;
struct hd_driveid *id = drive->id;
if ((id->capability & 1) != 0 && drive->autodma) {
- /* Consult the list of known "bad" drives */
- if (__ide_dma_bad_drive(drive))
- goto fast_ata_pio;
-
- if ((id->field_valid & 4) && siimage_ratemask(drive)) {
- if (id->dma_ultra & hwif->ultra_mask) {
- /* Force if Capable UltraDMA */
- int dma = config_chipset_for_dma(drive);
- if ((id->field_valid & 2) && !dma)
- goto try_dma_modes;
- }
- } else if (id->field_valid & 2) {
-try_dma_modes:
- if ((id->dma_mword & hwif->mwdma_mask) ||
- (id->dma_1word & hwif->swdma_mask)) {
- /* Force if Capable regular DMA modes */
- if (!config_chipset_for_dma(drive))
- goto no_dma_set;
- }
- } else if (__ide_dma_good_drive(drive) &&
- (id->eide_dma_time < 150)) {
- /* Consult the list of known "good" drives */
- if (!config_chipset_for_dma(drive))
- goto no_dma_set;
- } else {
- goto fast_ata_pio;
+
+ if (ide_use_dma(drive)) {
+ if (config_chipset_for_dma(drive))
+ return hwif->ide_dma_on(drive);
}
- return hwif->ide_dma_on(drive);
+
+ goto fast_ata_pio;
+
} else if ((id->capability & 8) || (id->field_valid & 2)) {
fast_ata_pio:
-no_dma_set:
config_chipset_for_pio(drive, 1);
return hwif->ide_dma_off_quietly(drive);
}
return 0;
}
-static int siimage_mmio_ide_dma_verbose (ide_drive_t *drive)
-{
- int temp = __ide_dma_verbose(drive);
- return temp;
-}
-
/**
* siimage_busproc - bus isolation ioctl
* @drive: drive to isolate/restore
unsigned long bar5 = pci_resource_start(dev, 5);
unsigned long barsize = pci_resource_len(dev, 5);
u8 tmpbyte = 0;
- unsigned long addr;
- void *ioaddr;
+ void __iomem *ioaddr;
/*
* Drop back to PIO if we can't map the mmio. Some
}
pci_set_master(dev);
- pci_set_drvdata(dev, ioaddr);
- addr = (unsigned long) ioaddr;
+ pci_set_drvdata(dev, (void *) ioaddr);
if (pdev_is_sata(dev)) {
- writel(0, addr + 0x148);
- writel(0, addr + 0x1C8);
+ writel(0, ioaddr + 0x148);
+ writel(0, ioaddr + 0x1C8);
}
- writeb(0, addr + 0xB4);
- writeb(0, addr + 0xF4);
- tmpbyte = readb(addr + 0x4A);
+ writeb(0, ioaddr + 0xB4);
+ writeb(0, ioaddr + 0xF4);
+ tmpbyte = readb(ioaddr + 0x4A);
switch(tmpbyte & 0x30) {
case 0x00:
/* In 100 MHz clocking, try and switch to 133 */
- writeb(tmpbyte|0x10, addr + 0x4A);
+ writeb(tmpbyte|0x10, ioaddr + 0x4A);
break;
case 0x10:
/* On 133Mhz clocking */
case 0x30:
/* Clocking is disabled */
/* 133 clock attempt to force it on */
- writeb(tmpbyte & ~0x20, addr + 0x4A);
+ writeb(tmpbyte & ~0x20, ioaddr + 0x4A);
break;
}
- writeb( 0x72, addr + 0xA1);
- writew( 0x328A, addr + 0xA2);
- writel(0x62DD62DD, addr + 0xA4);
- writel(0x43924392, addr + 0xA8);
- writel(0x40094009, addr + 0xAC);
- writeb( 0x72, addr + 0xE1);
- writew( 0x328A, addr + 0xE2);
- writel(0x62DD62DD, addr + 0xE4);
- writel(0x43924392, addr + 0xE8);
- writel(0x40094009, addr + 0xEC);
+ writeb( 0x72, ioaddr + 0xA1);
+ writew( 0x328A, ioaddr + 0xA2);
+ writel(0x62DD62DD, ioaddr + 0xA4);
+ writel(0x43924392, ioaddr + 0xA8);
+ writel(0x40094009, ioaddr + 0xAC);
+ writeb( 0x72, ioaddr + 0xE1);
+ writew( 0x328A, ioaddr + 0xE2);
+ writel(0x62DD62DD, ioaddr + 0xE4);
+ writel(0x43924392, ioaddr + 0xE8);
+ writel(0x40094009, ioaddr + 0xEC);
if (pdev_is_sata(dev)) {
- writel(0xFFFF0000, addr + 0x108);
- writel(0xFFFF0000, addr + 0x188);
- writel(0x00680000, addr + 0x148);
- writel(0x00680000, addr + 0x1C8);
+ writel(0xFFFF0000, ioaddr + 0x108);
+ writel(0xFFFF0000, ioaddr + 0x188);
+ writel(0x00680000, ioaddr + 0x148);
+ writel(0x00680000, ioaddr + 0x1C8);
}
- tmpbyte = readb(addr + 0x4A);
+ tmpbyte = readb(ioaddr + 0x4A);
proc_reports_siimage(dev, (tmpbyte>>4), name);
return 1;
* the MMIO layout isnt the same as the the standard port
* based I/O
*/
-
+
memset(&hw, 0, sizeof(hw_regs_t));
- hw.priv = addr;
- base = (unsigned long)addr;
- if(ch)
+ base = (unsigned long)addr;
+ if (ch)
base += 0xC0;
else
base += 0x80;
hw.io_ports[IDE_IRQ_OFFSET] = 0;
- if (pdev_is_sata(dev)) {
- base = (unsigned long) addr;
- if(ch)
- base += 0x80;
- hw.sata_scr[SATA_STATUS_OFFSET] = base + 0x104;
- hw.sata_scr[SATA_ERROR_OFFSET] = base + 0x108;
- hw.sata_scr[SATA_CONTROL_OFFSET]= base + 0x100;
- hw.sata_misc[SATA_MISC_OFFSET] = base + 0x140;
- hw.sata_misc[SATA_PHY_OFFSET] = base + 0x144;
- hw.sata_misc[SATA_IEN_OFFSET] = base + 0x148;
+ if (pdev_is_sata(dev)) {
+ base = (unsigned long)addr;
+ if (ch)
+ base += 0x80;
+ hwif->sata_scr[SATA_STATUS_OFFSET] = base + 0x104;
+ hwif->sata_scr[SATA_ERROR_OFFSET] = base + 0x108;
+ hwif->sata_scr[SATA_CONTROL_OFFSET] = base + 0x100;
+ hwif->sata_misc[SATA_MISC_OFFSET] = base + 0x140;
+ hwif->sata_misc[SATA_PHY_OFFSET] = base + 0x144;
+ hwif->sata_misc[SATA_IEN_OFFSET] = base + 0x148;
}
hw.irq = hwif->pci_dev->irq;
memcpy(&hwif->hw, &hw, sizeof(hw));
memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->hw.io_ports));
- if (is_sata(hwif)) {
- memcpy(hwif->sata_scr, hwif->hw.sata_scr, sizeof(hwif->hw.sata_scr));
- memcpy(hwif->sata_misc, hwif->hw.sata_misc, sizeof(hwif->hw.sata_misc));
- }
-
hwif->irq = hw.irq;
base = (unsigned long) addr;
return 0;
}
+/**
+ * siimage_fixup - post probe fixups
+ * @hwif: interface to fix up
+ *
+ * Called after drive probe we use this to decide whether the
+ * Seagate fixup must be applied. This used to be in init_iops but
+ * that can occur before we know what drives are present.
+ */
+
+static void __devinit siimage_fixup(ide_hwif_t *hwif)
+{
+ /* Try and raise the rqsize */
+ if (!is_sata(hwif) || !is_dev_seagate_sata(&hwif->drives[0]))
+ hwif->rqsize = 128;
+}
+
/**
* init_iops_siimage - set up iops
* @hwif: interface to set up
hwif->hwif_data = NULL;
- hwif->rqsize = 128;
- if (is_sata(hwif) && is_dev_seagate_sata(&hwif->drives[0]))
- hwif->rqsize = 15;
+ /* Pessimal until we finish probing */
+ hwif->rqsize = 15;
if (pci_get_drvdata(dev) == NULL)
return;
if (hwif->mmio) {
hwif->ide_dma_test_irq = &siimage_mmio_ide_dma_test_irq;
- hwif->ide_dma_verbose = &siimage_mmio_ide_dma_verbose;
} else {
hwif->ide_dma_test_irq = & siimage_io_ide_dma_test_irq;
}
.init_chipset = init_chipset_siimage, \
.init_iops = init_iops_siimage, \
.init_hwif = init_hwif_siimage, \
+ .fixup = siimage_fixup, \
.channels = 2, \
.autodma = AUTODMA, \
.bootable = ON_BOARD, \
#ifdef CONFIG_BLK_DEV_IDE_SATA
{ PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
{ PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_1210SA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
+ { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3},
+ { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4},
#endif
{ 0, },
};
MODULE_DEVICE_TABLE(pci, siimage_pci_tbl);
static struct pci_driver driver = {
- .name = "SiI IDE",
+ .name = "SiI_IDE",
.id_table = siimage_pci_tbl,
.probe = siimage_init_one,
};
git://git.onelab.eu / linux-2.6.git / blobdiff