*/
-#include <linux/config.h>
#include "hisax.h"
#include "isac.h"
#include "isdnl1.h"
#include "amd7930_fn.h"
-#include "enternow.h"
#include <linux/interrupt.h>
#include <linux/ppp_defs.h>
#include <linux/pci.h>
-const char *enternow_pci_rev = "$Revision: 1.1.4.5 $";
+static const char *enternow_pci_rev = "$Revision: 1.1.4.5 $";
+
+
+/* für PowerISDN PCI */
+#define TJ_AMD_IRQ 0x20
+#define TJ_LED1 0x40
+#define TJ_LED2 0x80
+
+
+/* Das Fenster zum AMD...
+ * Ab Adresse hw.njet.base + TJ_AMD_PORT werden vom AMD jeweils 8 Bit in
+ * den TigerJet i/o-Raum gemappt
+ * -> 0x01 des AMD bei hw.njet.base + 0C4 */
+#define TJ_AMD_PORT 0xC0
+
/* *************************** I/O-Interface functions ************************************* */
/* cs->readisac, macro rByteAMD */
-BYTE
-ReadByteAmd7930(struct IsdnCardState *cs, BYTE offset)
+static unsigned char
+ReadByteAmd7930(struct IsdnCardState *cs, unsigned char offset)
{
/* direktes Register */
if(offset < 8)
- return (InByte(cs->hw.njet.isac + 4*offset));
+ return (inb(cs->hw.njet.isac + 4*offset));
/* indirektes Register */
else {
- OutByte(cs->hw.njet.isac + 4*AMD_CR, offset);
- return(InByte(cs->hw.njet.isac + 4*AMD_DR));
+ outb(offset, cs->hw.njet.isac + 4*AMD_CR);
+ return(inb(cs->hw.njet.isac + 4*AMD_DR));
}
}
/* cs->writeisac, macro wByteAMD */
-void
-WriteByteAmd7930(struct IsdnCardState *cs, BYTE offset, BYTE value)
+static void
+WriteByteAmd7930(struct IsdnCardState *cs, unsigned char offset, unsigned char value)
{
/* direktes Register */
if(offset < 8)
- OutByte(cs->hw.njet.isac + 4*offset, value);
+ outb(value, cs->hw.njet.isac + 4*offset);
/* indirektes Register */
else {
- OutByte(cs->hw.njet.isac + 4*AMD_CR, offset);
- OutByte(cs->hw.njet.isac + 4*AMD_DR, value);
+ outb(offset, cs->hw.njet.isac + 4*AMD_CR);
+ outb(value, cs->hw.njet.isac + 4*AMD_DR);
}
}
-void
-enpci_setIrqMask(struct IsdnCardState *cs, BYTE val) {
+static void
+enpci_setIrqMask(struct IsdnCardState *cs, unsigned char val) {
if (!val)
- OutByte(cs->hw.njet.base+NETJET_IRQMASK1, 0x00);
+ outb(0x00, cs->hw.njet.base+NETJET_IRQMASK1);
else
- OutByte(cs->hw.njet.base+NETJET_IRQMASK1, TJ_AMD_IRQ);
+ outb(TJ_AMD_IRQ, cs->hw.njet.base+NETJET_IRQMASK1);
}
-static BYTE dummyrr(struct IsdnCardState *cs, int chan, BYTE off)
+static unsigned char dummyrr(struct IsdnCardState *cs, int chan, unsigned char off)
{
return(5);
}
-static void dummywr(struct IsdnCardState *cs, int chan, BYTE off, BYTE value)
+static void dummywr(struct IsdnCardState *cs, int chan, unsigned char off, unsigned char value)
{
}
/* Reset on, (also for AMD) */
cs->hw.njet.ctrl_reg = 0x07;
- OutByte(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
+ outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
mdelay(20);
/* Reset off */
cs->hw.njet.ctrl_reg = 0x30;
- OutByte(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
+ outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
/* 20ms delay */
mdelay(20);
cs->hw.njet.auxd = 0; // LED-status
cs->hw.njet.dmactrl = 0;
- OutByte(cs->hw.njet.base + NETJET_AUXCTRL, ~TJ_AMD_IRQ);
- OutByte(cs->hw.njet.base + NETJET_IRQMASK1, TJ_AMD_IRQ);
- OutByte(cs->hw.njet.auxa, cs->hw.njet.auxd); // LED off
+ outb(~TJ_AMD_IRQ, cs->hw.njet.base + NETJET_AUXCTRL);
+ outb(TJ_AMD_IRQ, cs->hw.njet.base + NETJET_IRQMASK1);
+ outb(cs->hw.njet.auxd, cs->hw.njet.auxa); // LED off
}
enpci_card_msg(struct IsdnCardState *cs, int mt, void *arg)
{
u_long flags;
- BYTE *chan;
+ unsigned char *chan;
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "enter:now PCI: card_msg: 0x%04X", mt);
case MDL_ASSIGN:
/* TEI assigned, LED1 on */
cs->hw.njet.auxd = TJ_AMD_IRQ << 1;
- OutByte(cs->hw.njet.base + NETJET_AUXDATA, cs->hw.njet.auxd);
+ outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
break;
case MDL_REMOVE:
/* TEI removed, LEDs off */
cs->hw.njet.auxd = 0;
- OutByte(cs->hw.njet.base + NETJET_AUXDATA, 0x00);
+ outb(0x00, cs->hw.njet.base + NETJET_AUXDATA);
break;
case MDL_BC_ASSIGN:
/* activate B-channel */
- chan = (BYTE *)arg;
+ chan = (unsigned char *)arg;
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "enter:now PCI: assign phys. BC %d in AMD LMR1", *chan);
cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 | (*chan + 1)), "MDL_BC_ASSIGN");
/* at least one b-channel in use, LED 2 on */
cs->hw.njet.auxd |= TJ_AMD_IRQ << 2;
- OutByte(cs->hw.njet.base + NETJET_AUXDATA, cs->hw.njet.auxd);
+ outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
break;
case MDL_BC_RELEASE:
/* deactivate B-channel */
- chan = (BYTE *)arg;
+ chan = (unsigned char *)arg;
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "enter:now PCI: release phys. BC %d in Amd LMR1", *chan);
/* no b-channel active -> LED2 off */
if (!(cs->dc.amd7930.lmr1 & 3)) {
cs->hw.njet.auxd &= ~(TJ_AMD_IRQ << 2);
- OutByte(cs->hw.njet.base + NETJET_AUXDATA, cs->hw.njet.auxd);
+ outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
}
break;
default:
}
static irqreturn_t
-enpci_interrupt(int intno, void *dev_id, struct pt_regs *regs)
+enpci_interrupt(int intno, void *dev_id)
{
struct IsdnCardState *cs = dev_id;
- BYTE s0val, s1val, ir;
+ unsigned char s0val, s1val, ir;
u_long flags;
spin_lock_irqsave(&cs->lock, flags);
- s1val = InByte(cs->hw.njet.base + NETJET_IRQSTAT1);
+ s1val = inb(cs->hw.njet.base + NETJET_IRQSTAT1);
/* AMD threw an interrupt */
if (!(s1val & TJ_AMD_IRQ)) {
s1val = 1;
} else
s1val = 0;
- s0val = InByte(cs->hw.njet.base + NETJET_IRQSTAT0);
+ s0val = inb(cs->hw.njet.base + NETJET_IRQSTAT0);
if ((s0val | s1val)==0) { // shared IRQ
spin_unlock_irqrestore(&cs->lock, flags);
return IRQ_NONE;
}
if (s0val)
- OutByte(cs->hw.njet.base + NETJET_IRQSTAT0, s0val);
+ outb(s0val, cs->hw.njet.base + NETJET_IRQSTAT0);
/* DMA-Interrupt: B-channel-stuff */
/* set bits in sval to indicate which page is free */
}
-static struct pci_dev *dev_netjet __initdata = NULL;
+static struct pci_dev *dev_netjet __devinitdata = NULL;
/* called by config.c */
-int __init
+int __devinit
setup_enternow_pci(struct IsdnCard *card)
{
int bytecnt;
/* Reset an */
cs->hw.njet.ctrl_reg = 0x07; // geändert von 0xff
- OutByte(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
+ outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
/* 20 ms Pause */
mdelay(20);
cs->hw.njet.ctrl_reg = 0x30; /* Reset Off and status read clear */
- OutByte(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
+ outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
mdelay(10);
cs->hw.njet.auxd = 0x00; // war 0xc0
cs->hw.njet.dmactrl = 0;
- OutByte(cs->hw.njet.base + NETJET_AUXCTRL, ~TJ_AMD_IRQ);
- OutByte(cs->hw.njet.base + NETJET_IRQMASK1, TJ_AMD_IRQ);
- OutByte(cs->hw.njet.auxa, cs->hw.njet.auxd);
+ outb(~TJ_AMD_IRQ, cs->hw.njet.base + NETJET_AUXCTRL);
+ outb(TJ_AMD_IRQ, cs->hw.njet.base + NETJET_IRQMASK1);
+ outb(cs->hw.njet.auxd, cs->hw.njet.auxa);
break;
}
cs->BC_Send_Data = &netjet_fill_dma;
cs->cardmsg = &enpci_card_msg;
cs->irq_func = &enpci_interrupt;
- cs->irq_flags |= SA_SHIRQ;
+ cs->irq_flags |= IRQF_SHARED;
return (1);
}