/*
- * $Id: wr_sbc82xx_flash.c,v 1.1 2004/06/07 10:21:32 dwmw2 Exp $
+ * $Id: wr_sbc82xx_flash.c,v 1.8 2005/11/07 11:14:29 gleixner Exp $
*
* Map for flash chips on Wind River PowerQUICC II SBC82xx board.
*
#include <asm/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
-#include <linux/config.h>
#include <linux/mtd/partitions.h>
-#include <asm/immap_8260.h>
+#include <asm/immap_cpm2.h>
static struct mtd_info *sbcmtd[3];
static struct mtd_partition *sbcmtd_parts[3];
static struct mtd_partition bigflash_parts[] = {
{
.name = "bootloader",
- .size = 0x80000,
+ .size = 0x00100000,
.offset = 0,
}, {
.name = "file system",
- .size = MTDPART_SIZ_FULL,
+ .size = 0x01f00000,
+ .offset = MTDPART_OFS_APPEND,
+ }, {
+ .name = "boot config",
+ .size = 0x00100000,
+ .offset = MTDPART_OFS_APPEND,
+ }, {
+ .name = "space",
+ .size = 0x01f00000,
.offset = MTDPART_OFS_APPEND,
}
};
static const char *part_probes[] __initdata = {"cmdlinepart", "RedBoot", NULL};
+#define init_sbc82xx_one_flash(map, br, or) \
+do { \
+ (map).phys = (br & 1) ? (br & 0xffff8000) : 0; \
+ (map).size = (br & 1) ? (~(or & 0xffff8000) + 1) : 0; \
+ switch (br & 0x00001800) { \
+ case 0x00000000: \
+ case 0x00000800: (map).bankwidth = 1; break; \
+ case 0x00001000: (map).bankwidth = 2; break; \
+ case 0x00001800: (map).bankwidth = 4; break; \
+ } \
+} while (0);
+
int __init init_sbc82xx_flash(void)
{
- volatile memctl8260_t *mc = &immr->im_memctl;
+ volatile memctl_cpm2_t *mc = &cpm2_immr->im_memctl;
int bigflash;
int i;
- /* First, register the boot flash, whichever we're booting from */
- if ((mc->memc_br0 & 0x00001800) == 0x00001800) {
- bigflash = 0;
- } else if ((mc->memc_br0 & 0x00001800) == 0x00000800) {
- bigflash = 1;
- } else {
- printk(KERN_WARNING "Bus Controller register BR0 is %08x. Cannot determine flash configuration\n", mc->memc_br0);
- return 1;
- }
-
- /* Set parameters for the big flash chip (CS6 or CS0) */
- sbc82xx_flash_map[bigflash].buswidth = 4;
- sbc82xx_flash_map[bigflash].size = 0x4000000;
+#ifdef CONFIG_SBC8560
+ mc = ioremap(0xff700000 + 0x5000, sizeof(memctl_cpm2_t));
+#else
+ mc = &cpm2_immr->im_memctl;
+#endif
- /* Set parameters for the small flash chip (CS0 or CS6) */
- sbc82xx_flash_map[!bigflash].buswidth = 1;
- sbc82xx_flash_map[!bigflash].size = 0x200000;
+ bigflash = 1;
+ if ((mc->memc_br0 & 0x00001800) == 0x00001800)
+ bigflash = 0;
- /* Set parameters for the user flash chip (CS1) */
- sbc82xx_flash_map[2].buswidth = 4;
- sbc82xx_flash_map[2].size = 0x4000000;
+ init_sbc82xx_one_flash(sbc82xx_flash_map[0], mc->memc_br0, mc->memc_or0);
+ init_sbc82xx_one_flash(sbc82xx_flash_map[1], mc->memc_br6, mc->memc_or6);
+ init_sbc82xx_one_flash(sbc82xx_flash_map[2], mc->memc_br1, mc->memc_or1);
- sbc82xx_flash_map[0].phys = mc->memc_br0 & 0xffff8000;
- sbc82xx_flash_map[1].phys = mc->memc_br6 & 0xffff8000;
- sbc82xx_flash_map[2].phys = mc->memc_br1 & 0xffff8000;
+#ifdef CONFIG_SBC8560
+ iounmap((void *) mc);
+#endif
for (i=0; i<3; i++) {
int8_t flashcs[3] = { 0, 6, 1 };
int nr_parts;
printk(KERN_NOTICE "PowerQUICC II %s (%ld MiB on CS%d",
- sbc82xx_flash_map[i].name, sbc82xx_flash_map[i].size >> 20, flashcs[i]);
+ sbc82xx_flash_map[i].name,
+ (sbc82xx_flash_map[i].size >> 20),
+ flashcs[i]);
if (!sbc82xx_flash_map[i].phys) {
/* We know it can't be at zero. */
printk("): disabled by bootloader.\n");
}
printk(" at %08lx)\n", sbc82xx_flash_map[i].phys);
- sbc82xx_flash_map[i].virt = (unsigned long)ioremap(sbc82xx_flash_map[i].phys, sbc82xx_flash_map[i].size);
+ sbc82xx_flash_map[i].virt = ioremap(sbc82xx_flash_map[i].phys, sbc82xx_flash_map[i].size);
if (!sbc82xx_flash_map[i].virt) {
printk("Failed to ioremap\n");
del_mtd_partitions(sbcmtd[i]);
else
del_mtd_device(sbcmtd[i]);
-
+
kfree(sbcmtd_parts[i]);
map_destroy(sbcmtd[i]);
-
+
iounmap((void *)sbc82xx_flash_map[i].virt);
sbc82xx_flash_map[i].virt = 0;
}