#define DRV_MODULE_NAME "b44"
#define PFX DRV_MODULE_NAME ": "
-#define DRV_MODULE_VERSION "0.93"
-#define DRV_MODULE_RELDATE "Mar, 2004"
+#define DRV_MODULE_VERSION "0.94"
+#define DRV_MODULE_RELDATE "May 4, 2004"
#define B44_DEF_MSG_ENABLE \
(NETIF_MSG_DRV | \
static void b44_halt(struct b44 *);
static void b44_init_rings(struct b44 *);
-static int b44_init_hw(struct b44 *);
+static void b44_init_hw(struct b44 *);
+
+static inline unsigned long br32(const struct b44 *bp, unsigned long reg)
+{
+ return readl(bp->regs + reg);
+}
+
+static inline void bw32(const struct b44 *bp,
+ unsigned long reg, unsigned long val)
+{
+ writel(val, bp->regs + reg);
+}
static int b44_wait_bit(struct b44 *bp, unsigned long reg,
u32 bit, unsigned long timeout, const int clear)
unsigned long i;
for (i = 0; i < timeout; i++) {
- u32 val = br32(reg);
+ u32 val = br32(bp, reg);
if (clear && !(val & bit))
break;
static u32 ssb_get_core_rev(struct b44 *bp)
{
- return (br32(B44_SBIDHIGH) & SBIDHIGH_RC_MASK);
+ return (br32(bp, B44_SBIDHIGH) & SBIDHIGH_RC_MASK);
}
static u32 ssb_pci_setup(struct b44 *bp, u32 cores)
ssb_get_addr(bp, SBID_REG_PCI, 0));
pci_rev = ssb_get_core_rev(bp);
- val = br32(B44_SBINTVEC);
+ val = br32(bp, B44_SBINTVEC);
val |= cores;
- bw32(B44_SBINTVEC, val);
+ bw32(bp, B44_SBINTVEC, val);
- val = br32(SSB_PCI_TRANS_2);
+ val = br32(bp, SSB_PCI_TRANS_2);
val |= SSB_PCI_PREF | SSB_PCI_BURST;
- bw32(SSB_PCI_TRANS_2, val);
+ bw32(bp, SSB_PCI_TRANS_2, val);
pci_write_config_dword(bp->pdev, SSB_BAR0_WIN, bar_orig);
static void ssb_core_disable(struct b44 *bp)
{
- if (br32(B44_SBTMSLOW) & SBTMSLOW_RESET)
+ if (br32(bp, B44_SBTMSLOW) & SBTMSLOW_RESET)
return;
- bw32(B44_SBTMSLOW, (SBTMSLOW_REJECT | SBTMSLOW_CLOCK));
+ bw32(bp, B44_SBTMSLOW, (SBTMSLOW_REJECT | SBTMSLOW_CLOCK));
b44_wait_bit(bp, B44_SBTMSLOW, SBTMSLOW_REJECT, 100000, 0);
b44_wait_bit(bp, B44_SBTMSHIGH, SBTMSHIGH_BUSY, 100000, 1);
- bw32(B44_SBTMSLOW, (SBTMSLOW_FGC | SBTMSLOW_CLOCK |
+ bw32(bp, B44_SBTMSLOW, (SBTMSLOW_FGC | SBTMSLOW_CLOCK |
SBTMSLOW_REJECT | SBTMSLOW_RESET));
- br32(B44_SBTMSLOW);
+ br32(bp, B44_SBTMSLOW);
udelay(1);
- bw32(B44_SBTMSLOW, (SBTMSLOW_REJECT | SBTMSLOW_RESET));
- br32(B44_SBTMSLOW);
+ bw32(bp, B44_SBTMSLOW, (SBTMSLOW_REJECT | SBTMSLOW_RESET));
+ br32(bp, B44_SBTMSLOW);
udelay(1);
}
u32 val;
ssb_core_disable(bp);
- bw32(B44_SBTMSLOW, (SBTMSLOW_RESET | SBTMSLOW_CLOCK | SBTMSLOW_FGC));
- br32(B44_SBTMSLOW);
+ bw32(bp, B44_SBTMSLOW, (SBTMSLOW_RESET | SBTMSLOW_CLOCK | SBTMSLOW_FGC));
+ br32(bp, B44_SBTMSLOW);
udelay(1);
/* Clear SERR if set, this is a hw bug workaround. */
- if (br32(B44_SBTMSHIGH) & SBTMSHIGH_SERR)
- bw32(B44_SBTMSHIGH, 0);
+ if (br32(bp, B44_SBTMSHIGH) & SBTMSHIGH_SERR)
+ bw32(bp, B44_SBTMSHIGH, 0);
- val = br32(B44_SBIMSTATE);
+ val = br32(bp, B44_SBIMSTATE);
if (val & (SBIMSTATE_IBE | SBIMSTATE_TO))
- bw32(B44_SBIMSTATE, val & ~(SBIMSTATE_IBE | SBIMSTATE_TO));
+ bw32(bp, B44_SBIMSTATE, val & ~(SBIMSTATE_IBE | SBIMSTATE_TO));
- bw32(B44_SBTMSLOW, (SBTMSLOW_CLOCK | SBTMSLOW_FGC));
- br32(B44_SBTMSLOW);
+ bw32(bp, B44_SBTMSLOW, (SBTMSLOW_CLOCK | SBTMSLOW_FGC));
+ br32(bp, B44_SBTMSLOW);
udelay(1);
- bw32(B44_SBTMSLOW, (SBTMSLOW_CLOCK));
- br32(B44_SBTMSLOW);
+ bw32(bp, B44_SBTMSLOW, (SBTMSLOW_CLOCK));
+ br32(bp, B44_SBTMSLOW);
udelay(1);
}
static int ssb_core_unit(struct b44 *bp)
{
#if 0
- u32 val = br32(B44_SBADMATCH0);
+ u32 val = br32(bp, B44_SBADMATCH0);
u32 base;
type = val & SBADMATCH0_TYPE_MASK;
static int ssb_is_core_up(struct b44 *bp)
{
- return ((br32(B44_SBTMSLOW) & (SBTMSLOW_RESET | SBTMSLOW_REJECT | SBTMSLOW_CLOCK))
+ return ((br32(bp, B44_SBTMSLOW) & (SBTMSLOW_RESET | SBTMSLOW_REJECT | SBTMSLOW_CLOCK))
== SBTMSLOW_CLOCK);
}
val |= ((u32) data[3]) << 16;
val |= ((u32) data[4]) << 8;
val |= ((u32) data[5]) << 0;
- bw32(B44_CAM_DATA_LO, val);
+ bw32(bp, B44_CAM_DATA_LO, val);
val = (CAM_DATA_HI_VALID |
(((u32) data[0]) << 8) |
(((u32) data[1]) << 0));
- bw32(B44_CAM_DATA_HI, val);
- bw32(B44_CAM_CTRL, (CAM_CTRL_WRITE |
+ bw32(bp, B44_CAM_DATA_HI, val);
+ bw32(bp, B44_CAM_CTRL, (CAM_CTRL_WRITE |
(index << CAM_CTRL_INDEX_SHIFT)));
b44_wait_bit(bp, B44_CAM_CTRL, CAM_CTRL_BUSY, 100, 1);
}
static inline void __b44_disable_ints(struct b44 *bp)
{
- bw32(B44_IMASK, 0);
+ bw32(bp, B44_IMASK, 0);
}
static void b44_disable_ints(struct b44 *bp)
__b44_disable_ints(bp);
/* Flush posted writes. */
- br32(B44_IMASK);
+ br32(bp, B44_IMASK);
}
static void b44_enable_ints(struct b44 *bp)
{
- bw32(B44_IMASK, bp->imask);
+ bw32(bp, B44_IMASK, bp->imask);
}
static int b44_readphy(struct b44 *bp, int reg, u32 *val)
{
int err;
- bw32(B44_EMAC_ISTAT, EMAC_INT_MII);
- bw32(B44_MDIO_DATA, (MDIO_DATA_SB_START |
+ bw32(bp, B44_EMAC_ISTAT, EMAC_INT_MII);
+ bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START |
(MDIO_OP_READ << MDIO_DATA_OP_SHIFT) |
(bp->phy_addr << MDIO_DATA_PMD_SHIFT) |
(reg << MDIO_DATA_RA_SHIFT) |
(MDIO_TA_VALID << MDIO_DATA_TA_SHIFT)));
err = b44_wait_bit(bp, B44_EMAC_ISTAT, EMAC_INT_MII, 100, 0);
- *val = br32(B44_MDIO_DATA) & MDIO_DATA_DATA;
+ *val = br32(bp, B44_MDIO_DATA) & MDIO_DATA_DATA;
return err;
}
static int b44_writephy(struct b44 *bp, int reg, u32 val)
{
- bw32(B44_EMAC_ISTAT, EMAC_INT_MII);
- bw32(B44_MDIO_DATA, (MDIO_DATA_SB_START |
+ bw32(bp, B44_EMAC_ISTAT, EMAC_INT_MII);
+ bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START |
(MDIO_OP_WRITE << MDIO_DATA_OP_SHIFT) |
(bp->phy_addr << MDIO_DATA_PMD_SHIFT) |
(reg << MDIO_DATA_RA_SHIFT) |
return b44_wait_bit(bp, B44_EMAC_ISTAT, EMAC_INT_MII, 100, 0);
}
+/* miilib interface */
+/* FIXME FIXME: phy_id is ignored, bp->phy_addr use is unconditional
+ * due to code existing before miilib use was added to this driver.
+ * Someone should remove this artificial driver limitation in
+ * b44_{read,write}phy. bp->phy_addr itself is fine (and needed).
+ */
+static int b44_mii_read(struct net_device *dev, int phy_id, int location)
+{
+ u32 val;
+ struct b44 *bp = netdev_priv(dev);
+ int rc = b44_readphy(bp, location, &val);
+ if (rc)
+ return 0xffffffff;
+ return val;
+}
+
+static void b44_mii_write(struct net_device *dev, int phy_id, int location,
+ int val)
+{
+ struct b44 *bp = netdev_priv(dev);
+ b44_writephy(bp, location, val);
+}
+
static int b44_phy_reset(struct b44 *bp)
{
u32 val;
bp->flags &= ~(B44_FLAG_TX_PAUSE | B44_FLAG_RX_PAUSE);
bp->flags |= pause_flags;
- val = br32(B44_RXCONFIG);
+ val = br32(bp, B44_RXCONFIG);
if (pause_flags & B44_FLAG_RX_PAUSE)
val |= RXCONFIG_FLOW;
else
val &= ~RXCONFIG_FLOW;
- bw32(B44_RXCONFIG, val);
+ bw32(bp, B44_RXCONFIG, val);
- val = br32(B44_MAC_FLOW);
+ val = br32(bp, B44_MAC_FLOW);
if (pause_flags & B44_FLAG_TX_PAUSE)
val |= (MAC_FLOW_PAUSE_ENAB |
(0xc0 & MAC_FLOW_RX_HI_WATER));
else
val &= ~MAC_FLOW_PAUSE_ENAB;
- bw32(B44_MAC_FLOW, val);
+ bw32(bp, B44_MAC_FLOW, val);
}
static void b44_set_flow_ctrl(struct b44 *bp, u32 local, u32 remote)
val = &bp->hw_stats.tx_good_octets;
for (reg = B44_TX_GOOD_O; reg <= B44_TX_PAUSE; reg += 4UL) {
- *val++ += br32(reg);
+ *val++ += br32(bp, reg);
}
val = &bp->hw_stats.rx_good_octets;
for (reg = B44_RX_GOOD_O; reg <= B44_RX_NPAUSE; reg += 4UL) {
- *val++ += br32(reg);
+ *val++ += br32(bp, reg);
}
}
if (!netif_carrier_ok(bp->dev) &&
(bmsr & BMSR_LSTATUS)) {
- u32 val = br32(B44_TX_CTRL);
+ u32 val = br32(bp, B44_TX_CTRL);
u32 local_adv, remote_adv;
if (bp->flags & B44_FLAG_FULL_DUPLEX)
val |= TX_CTRL_DUPLEX;
else
val &= ~TX_CTRL_DUPLEX;
- bw32(B44_TX_CTRL, val);
+ bw32(bp, B44_TX_CTRL, val);
if (!(bp->flags & B44_FLAG_FORCE_LINK) &&
!b44_readphy(bp, MII_ADVERTISE, &local_adv) &&
{
u32 cur, cons;
- cur = br32(B44_DMATX_STAT) & DMATX_STAT_CDMASK;
+ cur = br32(bp, B44_DMATX_STAT) & DMATX_STAT_CDMASK;
cur /= sizeof(struct dma_desc);
/* XXX needs updating when NETIF_F_SG is supported */
TX_BUFFS_AVAIL(bp) > B44_TX_WAKEUP_THRESH)
netif_wake_queue(bp->dev);
- bw32(B44_GPTIMER, 0);
+ bw32(bp, B44_GPTIMER, 0);
}
/* Works like this. This chip writes a 'struct rx_header" 30 bytes
u32 cons, prod;
received = 0;
- prod = br32(B44_DMARX_STAT) & DMARX_STAT_CDMASK;
+ prod = br32(bp, B44_DMARX_STAT) & DMARX_STAT_CDMASK;
prod /= sizeof(struct dma_desc);
cons = bp->rx_cons;
}
bp->rx_cons = cons;
- bw32(B44_DMARX_PTR, cons * sizeof(struct dma_desc));
+ bw32(bp, B44_DMARX_PTR, cons * sizeof(struct dma_desc));
return received;
}
static int b44_poll(struct net_device *netdev, int *budget)
{
- struct b44 *bp = netdev->priv;
+ struct b44 *bp = netdev_priv(netdev);
int done;
spin_lock_irq(&bp->lock);
static irqreturn_t b44_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
struct net_device *dev = dev_id;
- struct b44 *bp = dev->priv;
+ struct b44 *bp = netdev_priv(dev);
unsigned long flags;
u32 istat, imask;
int handled = 0;
spin_lock_irqsave(&bp->lock, flags);
- istat = br32(B44_ISTAT);
- imask = br32(B44_IMASK);
+ istat = br32(bp, B44_ISTAT);
+ imask = br32(bp, B44_IMASK);
/* ??? What the fuck is the purpose of the interrupt mask
* ??? register if we have to mask it out by hand anyways?
dev->name);
}
- bw32(B44_ISTAT, istat);
- br32(B44_ISTAT);
+ bw32(bp, B44_ISTAT, istat);
+ br32(bp, B44_ISTAT);
}
spin_unlock_irqrestore(&bp->lock, flags);
return IRQ_RETVAL(handled);
static void b44_tx_timeout(struct net_device *dev)
{
- struct b44 *bp = dev->priv;
+ struct b44 *bp = netdev_priv(dev);
printk(KERN_ERR PFX "%s: transmit timed out, resetting\n",
dev->name);
static int b44_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
- struct b44 *bp = dev->priv;
+ struct b44 *bp = netdev_priv(dev);
dma_addr_t mapping;
u32 len, entry, ctrl;
wmb();
- bw32(B44_DMATX_PTR, entry * sizeof(struct dma_desc));
+ bw32(bp, B44_DMATX_PTR, entry * sizeof(struct dma_desc));
if (bp->flags & B44_FLAG_BUGGY_TXPTR)
- bw32(B44_DMATX_PTR, entry * sizeof(struct dma_desc));
+ bw32(bp, B44_DMATX_PTR, entry * sizeof(struct dma_desc));
if (bp->flags & B44_FLAG_REORDER_BUG)
- br32(B44_DMATX_PTR);
+ br32(bp, B44_DMATX_PTR);
if (TX_BUFFS_AVAIL(bp) < 1)
netif_stop_queue(dev);
static int b44_change_mtu(struct net_device *dev, int new_mtu)
{
- struct b44 *bp = dev->priv;
+ struct b44 *bp = netdev_priv(dev);
if (new_mtu < B44_MIN_MTU || new_mtu > B44_MAX_MTU)
return -EINVAL;
{
unsigned long reg;
- bw32(B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ);
+ bw32(bp, B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ);
for (reg = B44_TX_GOOD_O; reg <= B44_TX_PAUSE; reg += 4UL)
- br32(reg);
+ br32(bp, reg);
for (reg = B44_RX_GOOD_O; reg <= B44_RX_NPAUSE; reg += 4UL)
- br32(reg);
+ br32(bp, reg);
}
/* bp->lock is held. */
static void b44_chip_reset(struct b44 *bp)
{
if (ssb_is_core_up(bp)) {
- bw32(B44_RCV_LAZY, 0);
- bw32(B44_ENET_CTRL, ENET_CTRL_DISABLE);
+ bw32(bp, B44_RCV_LAZY, 0);
+ bw32(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE);
b44_wait_bit(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE, 100, 1);
- bw32(B44_DMATX_CTRL, 0);
+ bw32(bp, B44_DMATX_CTRL, 0);
bp->tx_prod = bp->tx_cons = 0;
- if (br32(B44_DMARX_STAT) & DMARX_STAT_EMASK) {
+ if (br32(bp, B44_DMARX_STAT) & DMARX_STAT_EMASK) {
b44_wait_bit(bp, B44_DMARX_STAT, DMARX_STAT_SIDLE,
100, 0);
}
- bw32(B44_DMARX_CTRL, 0);
+ bw32(bp, B44_DMARX_CTRL, 0);
bp->rx_prod = bp->rx_cons = 0;
} else {
ssb_pci_setup(bp, (bp->core_unit == 0 ?
b44_clear_stats(bp);
/* Make PHY accessible. */
- bw32(B44_MDIO_CTRL, (MDIO_CTRL_PREAMBLE |
+ bw32(bp, B44_MDIO_CTRL, (MDIO_CTRL_PREAMBLE |
(0x0d & MDIO_CTRL_MAXF_MASK)));
- br32(B44_MDIO_CTRL);
+ br32(bp, B44_MDIO_CTRL);
- if (!(br32(B44_DEVCTRL) & DEVCTRL_IPP)) {
- bw32(B44_ENET_CTRL, ENET_CTRL_EPSEL);
- br32(B44_ENET_CTRL);
+ if (!(br32(bp, B44_DEVCTRL) & DEVCTRL_IPP)) {
+ bw32(bp, B44_ENET_CTRL, ENET_CTRL_EPSEL);
+ br32(bp, B44_ENET_CTRL);
bp->flags &= ~B44_FLAG_INTERNAL_PHY;
} else {
- u32 val = br32(B44_DEVCTRL);
+ u32 val = br32(bp, B44_DEVCTRL);
if (val & DEVCTRL_EPR) {
- bw32(B44_DEVCTRL, (val & ~DEVCTRL_EPR));
- br32(B44_DEVCTRL);
+ bw32(bp, B44_DEVCTRL, (val & ~DEVCTRL_EPR));
+ br32(bp, B44_DEVCTRL);
udelay(100);
}
bp->flags |= B44_FLAG_INTERNAL_PHY;
/* bp->lock is held. */
static void __b44_set_mac_addr(struct b44 *bp)
{
- bw32(B44_CAM_CTRL, 0);
+ bw32(bp, B44_CAM_CTRL, 0);
if (!(bp->dev->flags & IFF_PROMISC)) {
u32 val;
__b44_cam_write(bp, bp->dev->dev_addr, 0);
- val = br32(B44_CAM_CTRL);
- bw32(B44_CAM_CTRL, val | CAM_CTRL_ENABLE);
+ val = br32(bp, B44_CAM_CTRL);
+ bw32(bp, B44_CAM_CTRL, val | CAM_CTRL_ENABLE);
}
}
static int b44_set_mac_addr(struct net_device *dev, void *p)
{
- struct b44 *bp = dev->priv;
+ struct b44 *bp = netdev_priv(dev);
struct sockaddr *addr = p;
if (netif_running(dev))
* packet processing. Invoked with bp->lock held.
*/
static void __b44_set_rx_mode(struct net_device *);
-static int b44_init_hw(struct b44 *bp)
+static void b44_init_hw(struct b44 *bp)
{
u32 val;
b44_chip_reset(bp);
b44_phy_reset(bp);
b44_setup_phy(bp);
- val = br32(B44_MAC_CTRL);
- bw32(B44_MAC_CTRL, val | MAC_CTRL_CRC32_ENAB);
- bw32(B44_RCV_LAZY, (1 << RCV_LAZY_FC_SHIFT));
+
+ /* Enable CRC32, set proper LED modes and power on PHY */
+ bw32(bp, B44_MAC_CTRL, MAC_CTRL_CRC32_ENAB | MAC_CTRL_PHY_LEDCTRL);
+ bw32(bp, B44_RCV_LAZY, (1 << RCV_LAZY_FC_SHIFT));
/* This sets the MAC address too. */
__b44_set_rx_mode(bp->dev);
/* MTU + eth header + possible VLAN tag + struct rx_header */
- bw32(B44_RXMAXLEN, bp->dev->mtu + ETH_HLEN + 8 + RX_HEADER_LEN);
- bw32(B44_TXMAXLEN, bp->dev->mtu + ETH_HLEN + 8 + RX_HEADER_LEN);
+ bw32(bp, B44_RXMAXLEN, bp->dev->mtu + ETH_HLEN + 8 + RX_HEADER_LEN);
+ bw32(bp, B44_TXMAXLEN, bp->dev->mtu + ETH_HLEN + 8 + RX_HEADER_LEN);
- bw32(B44_TX_WMARK, 56); /* XXX magic */
- bw32(B44_DMATX_CTRL, DMATX_CTRL_ENABLE);
- bw32(B44_DMATX_ADDR, bp->tx_ring_dma + bp->dma_offset);
- bw32(B44_DMARX_CTRL, (DMARX_CTRL_ENABLE |
+ bw32(bp, B44_TX_WMARK, 56); /* XXX magic */
+ bw32(bp, B44_DMATX_CTRL, DMATX_CTRL_ENABLE);
+ bw32(bp, B44_DMATX_ADDR, bp->tx_ring_dma + bp->dma_offset);
+ bw32(bp, B44_DMARX_CTRL, (DMARX_CTRL_ENABLE |
(bp->rx_offset << DMARX_CTRL_ROSHIFT)));
- bw32(B44_DMARX_ADDR, bp->rx_ring_dma + bp->dma_offset);
+ bw32(bp, B44_DMARX_ADDR, bp->rx_ring_dma + bp->dma_offset);
- bw32(B44_DMARX_PTR, bp->rx_pending);
+ bw32(bp, B44_DMARX_PTR, bp->rx_pending);
bp->rx_prod = bp->rx_pending;
- bw32(B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ);
+ bw32(bp, B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ);
- val = br32(B44_ENET_CTRL);
- bw32(B44_ENET_CTRL, (val | ENET_CTRL_ENABLE));
-
- return 0;
+ val = br32(bp, B44_ENET_CTRL);
+ bw32(bp, B44_ENET_CTRL, (val | ENET_CTRL_ENABLE));
}
static int b44_open(struct net_device *dev)
{
- struct b44 *bp = dev->priv;
+ struct b44 *bp = netdev_priv(dev);
int err;
err = b44_alloc_consistent(bp);
spin_lock_irq(&bp->lock);
b44_init_rings(bp);
- err = b44_init_hw(bp);
- if (err)
- goto err_out_noinit;
+ b44_init_hw(bp);
bp->flags |= B44_FLAG_INIT_COMPLETE;
spin_unlock_irq(&bp->lock);
return 0;
-err_out_noinit:
- b44_halt(bp);
- b44_free_rings(bp);
- spin_unlock_irq(&bp->lock);
- free_irq(dev->irq, dev);
err_out_free:
b44_free_consistent(bp);
return err;
static int b44_close(struct net_device *dev)
{
- struct b44 *bp = dev->priv;
+ struct b44 *bp = netdev_priv(dev);
netif_stop_queue(dev);
static struct net_device_stats *b44_get_stats(struct net_device *dev)
{
- struct b44 *bp = dev->priv;
+ struct b44 *bp = netdev_priv(dev);
struct net_device_stats *nstat = &bp->stats;
struct b44_hw_stats *hwstat = &bp->hw_stats;
return nstat;
}
-static void __b44_load_mcast(struct b44 *bp, struct net_device *dev)
+static int __b44_load_mcast(struct b44 *bp, struct net_device *dev)
{
struct dev_mc_list *mclist;
int i, num_ents;
for (i = 0; mclist && i < num_ents; i++, mclist = mclist->next) {
__b44_cam_write(bp, mclist->dmi_addr, i + 1);
}
+ return i+1;
}
static void __b44_set_rx_mode(struct net_device *dev)
{
- struct b44 *bp = dev->priv;
+ struct b44 *bp = netdev_priv(dev);
u32 val;
+ int i=0;
+ unsigned char zero[6] = {0,0,0,0,0,0};
- val = br32(B44_RXCONFIG);
+ val = br32(bp, B44_RXCONFIG);
val &= ~(RXCONFIG_PROMISC | RXCONFIG_ALLMULTI);
if (dev->flags & IFF_PROMISC) {
val |= RXCONFIG_PROMISC;
- bw32(B44_RXCONFIG, val);
+ bw32(bp, B44_RXCONFIG, val);
} else {
__b44_set_mac_addr(bp);
if (dev->flags & IFF_ALLMULTI)
val |= RXCONFIG_ALLMULTI;
else
- __b44_load_mcast(bp, dev);
-
- bw32(B44_RXCONFIG, val);
- val = br32(B44_CAM_CTRL);
- bw32(B44_CAM_CTRL, val | CAM_CTRL_ENABLE);
+ i=__b44_load_mcast(bp, dev);
+
+ for(;i<64;i++) {
+ __b44_cam_write(bp, zero, i);
+ }
+ bw32(bp, B44_RXCONFIG, val);
+ val = br32(bp, B44_CAM_CTRL);
+ bw32(bp, B44_CAM_CTRL, val | CAM_CTRL_ENABLE);
}
}
static void b44_set_rx_mode(struct net_device *dev)
{
- struct b44 *bp = dev->priv;
+ struct b44 *bp = netdev_priv(dev);
spin_lock_irq(&bp->lock);
__b44_set_rx_mode(dev);
spin_unlock_irq(&bp->lock);
}
-static int b44_ethtool_ioctl (struct net_device *dev, void __user *useraddr)
+static u32 b44_get_msglevel(struct net_device *dev)
{
- struct b44 *bp = dev->priv;
+ struct b44 *bp = netdev_priv(dev);
+ return bp->msg_enable;
+}
+
+static void b44_set_msglevel(struct net_device *dev, u32 value)
+{
+ struct b44 *bp = netdev_priv(dev);
+ bp->msg_enable = value;
+}
+
+static void b44_get_drvinfo (struct net_device *dev, struct ethtool_drvinfo *info)
+{
+ struct b44 *bp = netdev_priv(dev);
struct pci_dev *pci_dev = bp->pdev;
- u32 ethcmd;
-
- if (copy_from_user (ðcmd, useraddr, sizeof (ethcmd)))
- return -EFAULT;
-
- switch (ethcmd) {
- case ETHTOOL_GDRVINFO:{
- struct ethtool_drvinfo info = { ETHTOOL_GDRVINFO };
- strcpy (info.driver, DRV_MODULE_NAME);
- strcpy (info.version, DRV_MODULE_VERSION);
- memset(&info.fw_version, 0, sizeof(info.fw_version));
- strcpy (info.bus_info, pci_name(pci_dev));
- info.eedump_len = 0;
- info.regdump_len = 0;
- if (copy_to_user (useraddr, &info, sizeof (info)))
- return -EFAULT;
- return 0;
- }
- case ETHTOOL_GSET: {
- struct ethtool_cmd cmd = { ETHTOOL_GSET };
+ strcpy (info->driver, DRV_MODULE_NAME);
+ strcpy (info->version, DRV_MODULE_VERSION);
+ strcpy (info->bus_info, pci_name(pci_dev));
+}
- if (!(bp->flags & B44_FLAG_INIT_COMPLETE))
- return -EAGAIN;
- cmd.supported = (SUPPORTED_Autoneg);
- cmd.supported |= (SUPPORTED_100baseT_Half |
- SUPPORTED_100baseT_Full |
- SUPPORTED_10baseT_Half |
- SUPPORTED_10baseT_Full |
- SUPPORTED_MII);
+static int b44_nway_reset(struct net_device *dev)
+{
+ struct b44 *bp = netdev_priv(dev);
+ u32 bmcr;
+ int r;
- cmd.advertising = 0;
- if (bp->flags & B44_FLAG_ADV_10HALF)
- cmd.advertising |= ADVERTISE_10HALF;
- if (bp->flags & B44_FLAG_ADV_10FULL)
- cmd.advertising |= ADVERTISE_10FULL;
- if (bp->flags & B44_FLAG_ADV_100HALF)
- cmd.advertising |= ADVERTISE_100HALF;
- if (bp->flags & B44_FLAG_ADV_100FULL)
- cmd.advertising |= ADVERTISE_100FULL;
- cmd.advertising |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
- cmd.speed = (bp->flags & B44_FLAG_100_BASE_T) ?
- SPEED_100 : SPEED_10;
- cmd.duplex = (bp->flags & B44_FLAG_FULL_DUPLEX) ?
- DUPLEX_FULL : DUPLEX_HALF;
- cmd.port = 0;
- cmd.phy_address = bp->phy_addr;
- cmd.transceiver = (bp->flags & B44_FLAG_INTERNAL_PHY) ?
- XCVR_INTERNAL : XCVR_EXTERNAL;
- cmd.autoneg = (bp->flags & B44_FLAG_FORCE_LINK) ?
- AUTONEG_DISABLE : AUTONEG_ENABLE;
- cmd.maxtxpkt = 0;
- cmd.maxrxpkt = 0;
- if (copy_to_user(useraddr, &cmd, sizeof(cmd)))
- return -EFAULT;
- return 0;
+ spin_lock_irq(&bp->lock);
+ b44_readphy(bp, MII_BMCR, &bmcr);
+ b44_readphy(bp, MII_BMCR, &bmcr);
+ r = -EINVAL;
+ if (bmcr & BMCR_ANENABLE) {
+ b44_writephy(bp, MII_BMCR,
+ bmcr | BMCR_ANRESTART);
+ r = 0;
}
- case ETHTOOL_SSET: {
- struct ethtool_cmd cmd;
-
- if (!(bp->flags & B44_FLAG_INIT_COMPLETE))
- return -EAGAIN;
-
- if (copy_from_user(&cmd, useraddr, sizeof(cmd)))
- return -EFAULT;
-
- /* We do not support gigabit. */
- if (cmd.autoneg == AUTONEG_ENABLE) {
- if (cmd.advertising &
- (ADVERTISED_1000baseT_Half |
- ADVERTISED_1000baseT_Full))
- return -EINVAL;
- } else if ((cmd.speed != SPEED_100 &&
- cmd.speed != SPEED_10) ||
- (cmd.duplex != DUPLEX_HALF &&
- cmd.duplex != DUPLEX_FULL)) {
- return -EINVAL;
- }
+ spin_unlock_irq(&bp->lock);
- spin_lock_irq(&bp->lock);
+ return r;
+}
- if (cmd.autoneg == AUTONEG_ENABLE) {
- bp->flags &= ~B44_FLAG_FORCE_LINK;
- bp->flags &= ~(B44_FLAG_ADV_10HALF |
- B44_FLAG_ADV_10FULL |
- B44_FLAG_ADV_100HALF |
- B44_FLAG_ADV_100FULL);
- if (cmd.advertising & ADVERTISE_10HALF)
- bp->flags |= B44_FLAG_ADV_10HALF;
- if (cmd.advertising & ADVERTISE_10FULL)
- bp->flags |= B44_FLAG_ADV_10FULL;
- if (cmd.advertising & ADVERTISE_100HALF)
- bp->flags |= B44_FLAG_ADV_100HALF;
- if (cmd.advertising & ADVERTISE_100FULL)
- bp->flags |= B44_FLAG_ADV_100FULL;
- } else {
- bp->flags |= B44_FLAG_FORCE_LINK;
- if (cmd.speed == SPEED_100)
- bp->flags |= B44_FLAG_100_BASE_T;
- if (cmd.duplex == DUPLEX_FULL)
- bp->flags |= B44_FLAG_FULL_DUPLEX;
- }
+static int b44_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
+{
+ struct b44 *bp = netdev_priv(dev);
+
+ if (!(bp->flags & B44_FLAG_INIT_COMPLETE))
+ return -EAGAIN;
+ cmd->supported = (SUPPORTED_Autoneg);
+ cmd->supported |= (SUPPORTED_100baseT_Half |
+ SUPPORTED_100baseT_Full |
+ SUPPORTED_10baseT_Half |
+ SUPPORTED_10baseT_Full |
+ SUPPORTED_MII);
+
+ cmd->advertising = 0;
+ if (bp->flags & B44_FLAG_ADV_10HALF)
+ cmd->advertising |= ADVERTISE_10HALF;
+ if (bp->flags & B44_FLAG_ADV_10FULL)
+ cmd->advertising |= ADVERTISE_10FULL;
+ if (bp->flags & B44_FLAG_ADV_100HALF)
+ cmd->advertising |= ADVERTISE_100HALF;
+ if (bp->flags & B44_FLAG_ADV_100FULL)
+ cmd->advertising |= ADVERTISE_100FULL;
+ cmd->advertising |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
+ cmd->speed = (bp->flags & B44_FLAG_100_BASE_T) ?
+ SPEED_100 : SPEED_10;
+ cmd->duplex = (bp->flags & B44_FLAG_FULL_DUPLEX) ?
+ DUPLEX_FULL : DUPLEX_HALF;
+ cmd->port = 0;
+ cmd->phy_address = bp->phy_addr;
+ cmd->transceiver = (bp->flags & B44_FLAG_INTERNAL_PHY) ?
+ XCVR_INTERNAL : XCVR_EXTERNAL;
+ cmd->autoneg = (bp->flags & B44_FLAG_FORCE_LINK) ?
+ AUTONEG_DISABLE : AUTONEG_ENABLE;
+ cmd->maxtxpkt = 0;
+ cmd->maxrxpkt = 0;
+ return 0;
+}
- b44_setup_phy(bp);
+static int b44_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
+{
+ struct b44 *bp = netdev_priv(dev);
- spin_unlock_irq(&bp->lock);
+ if (!(bp->flags & B44_FLAG_INIT_COMPLETE))
+ return -EAGAIN;
- return 0;
- }
-
- case ETHTOOL_GMSGLVL: {
- struct ethtool_value edata = { ETHTOOL_GMSGLVL };
- edata.data = bp->msg_enable;
- if (copy_to_user(useraddr, &edata, sizeof(edata)))
- return -EFAULT;
- return 0;
- }
- case ETHTOOL_SMSGLVL: {
- struct ethtool_value edata;
- if (copy_from_user(&edata, useraddr, sizeof(edata)))
- return -EFAULT;
- bp->msg_enable = edata.data;
- return 0;
+ /* We do not support gigabit. */
+ if (cmd->autoneg == AUTONEG_ENABLE) {
+ if (cmd->advertising &
+ (ADVERTISED_1000baseT_Half |
+ ADVERTISED_1000baseT_Full))
+ return -EINVAL;
+ } else if ((cmd->speed != SPEED_100 &&
+ cmd->speed != SPEED_10) ||
+ (cmd->duplex != DUPLEX_HALF &&
+ cmd->duplex != DUPLEX_FULL)) {
+ return -EINVAL;
}
- case ETHTOOL_NWAY_RST: {
- u32 bmcr;
- int r;
- spin_lock_irq(&bp->lock);
- b44_readphy(bp, MII_BMCR, &bmcr);
- b44_readphy(bp, MII_BMCR, &bmcr);
- r = -EINVAL;
- if (bmcr & BMCR_ANENABLE) {
- b44_writephy(bp, MII_BMCR,
- bmcr | BMCR_ANRESTART);
- r = 0;
- }
- spin_unlock_irq(&bp->lock);
+ spin_lock_irq(&bp->lock);
- return r;
- }
- case ETHTOOL_GLINK: {
- struct ethtool_value edata = { ETHTOOL_GLINK };
- edata.data = netif_carrier_ok(bp->dev) ? 1 : 0;
- if (copy_to_user(useraddr, &edata, sizeof(edata)))
- return -EFAULT;
- return 0;
+ if (cmd->autoneg == AUTONEG_ENABLE) {
+ bp->flags &= ~B44_FLAG_FORCE_LINK;
+ bp->flags &= ~(B44_FLAG_ADV_10HALF |
+ B44_FLAG_ADV_10FULL |
+ B44_FLAG_ADV_100HALF |
+ B44_FLAG_ADV_100FULL);
+ if (cmd->advertising & ADVERTISE_10HALF)
+ bp->flags |= B44_FLAG_ADV_10HALF;
+ if (cmd->advertising & ADVERTISE_10FULL)
+ bp->flags |= B44_FLAG_ADV_10FULL;
+ if (cmd->advertising & ADVERTISE_100HALF)
+ bp->flags |= B44_FLAG_ADV_100HALF;
+ if (cmd->advertising & ADVERTISE_100FULL)
+ bp->flags |= B44_FLAG_ADV_100FULL;
+ } else {
+ bp->flags |= B44_FLAG_FORCE_LINK;
+ if (cmd->speed == SPEED_100)
+ bp->flags |= B44_FLAG_100_BASE_T;
+ if (cmd->duplex == DUPLEX_FULL)
+ bp->flags |= B44_FLAG_FULL_DUPLEX;
}
- case ETHTOOL_GRINGPARAM: {
- struct ethtool_ringparam ering = { ETHTOOL_GRINGPARAM };
-
- ering.rx_max_pending = B44_RX_RING_SIZE - 1;
- ering.rx_pending = bp->rx_pending;
- /* XXX ethtool lacks a tx_max_pending, oops... */
+ b44_setup_phy(bp);
- if (copy_to_user(useraddr, &ering, sizeof(ering)))
- return -EFAULT;
- return 0;
- }
- case ETHTOOL_SRINGPARAM: {
- struct ethtool_ringparam ering;
+ spin_unlock_irq(&bp->lock);
- if (copy_from_user(&ering, useraddr, sizeof(ering)))
- return -EFAULT;
+ return 0;
+}
- if ((ering.rx_pending > B44_RX_RING_SIZE - 1) ||
- (ering.rx_mini_pending != 0) ||
- (ering.rx_jumbo_pending != 0) ||
- (ering.tx_pending > B44_TX_RING_SIZE - 1))
- return -EINVAL;
+static void b44_get_ringparam(struct net_device *dev,
+ struct ethtool_ringparam *ering)
+{
+ struct b44 *bp = netdev_priv(dev);
- spin_lock_irq(&bp->lock);
+ ering->rx_max_pending = B44_RX_RING_SIZE - 1;
+ ering->rx_pending = bp->rx_pending;
- bp->rx_pending = ering.rx_pending;
- bp->tx_pending = ering.tx_pending;
+ /* XXX ethtool lacks a tx_max_pending, oops... */
+}
- b44_halt(bp);
- b44_init_rings(bp);
- b44_init_hw(bp);
- netif_wake_queue(bp->dev);
- spin_unlock_irq(&bp->lock);
+static int b44_set_ringparam(struct net_device *dev,
+ struct ethtool_ringparam *ering)
+{
+ struct b44 *bp = netdev_priv(dev);
- b44_enable_ints(bp);
-
- return 0;
- }
- case ETHTOOL_GPAUSEPARAM: {
- struct ethtool_pauseparam epause = { ETHTOOL_GPAUSEPARAM };
-
- epause.autoneg =
- (bp->flags & B44_FLAG_PAUSE_AUTO) != 0;
- epause.rx_pause =
- (bp->flags & B44_FLAG_RX_PAUSE) != 0;
- epause.tx_pause =
- (bp->flags & B44_FLAG_TX_PAUSE) != 0;
- if (copy_to_user(useraddr, &epause, sizeof(epause)))
- return -EFAULT;
- return 0;
- }
- case ETHTOOL_SPAUSEPARAM: {
- struct ethtool_pauseparam epause;
+ if ((ering->rx_pending > B44_RX_RING_SIZE - 1) ||
+ (ering->rx_mini_pending != 0) ||
+ (ering->rx_jumbo_pending != 0) ||
+ (ering->tx_pending > B44_TX_RING_SIZE - 1))
+ return -EINVAL;
- if (copy_from_user(&epause, useraddr, sizeof(epause)))
- return -EFAULT;
+ spin_lock_irq(&bp->lock);
- spin_lock_irq(&bp->lock);
- if (epause.autoneg)
- bp->flags |= B44_FLAG_PAUSE_AUTO;
- else
- bp->flags &= ~B44_FLAG_PAUSE_AUTO;
- if (epause.rx_pause)
- bp->flags |= B44_FLAG_RX_PAUSE;
- else
- bp->flags &= ~B44_FLAG_RX_PAUSE;
- if (epause.tx_pause)
- bp->flags |= B44_FLAG_TX_PAUSE;
- else
- bp->flags &= ~B44_FLAG_TX_PAUSE;
- if (bp->flags & B44_FLAG_PAUSE_AUTO) {
- b44_halt(bp);
- b44_init_rings(bp);
- b44_init_hw(bp);
- } else {
- __b44_set_flow_ctrl(bp, bp->flags);
- }
- spin_unlock_irq(&bp->lock);
+ bp->rx_pending = ering->rx_pending;
+ bp->tx_pending = ering->tx_pending;
- b44_enable_ints(bp);
-
- return 0;
- }
- };
+ b44_halt(bp);
+ b44_init_rings(bp);
+ b44_init_hw(bp);
+ netif_wake_queue(bp->dev);
+ spin_unlock_irq(&bp->lock);
- return -EOPNOTSUPP;
+ b44_enable_ints(bp);
+
+ return 0;
}
-static int b44_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
+static void b44_get_pauseparam(struct net_device *dev,
+ struct ethtool_pauseparam *epause)
{
- struct mii_ioctl_data __user *data = (struct mii_ioctl_data __user *)&ifr->ifr_data;
- struct b44 *bp = dev->priv;
- int err;
-
- switch (cmd) {
- case SIOCETHTOOL:
- return b44_ethtool_ioctl(dev, (void __user*) ifr->ifr_data);
-
- case SIOCGMIIPHY:
- data->phy_id = bp->phy_addr;
-
- /* fallthru */
- case SIOCGMIIREG: {
- u32 mii_regval;
-
- spin_lock_irq(&bp->lock);
- err = b44_readphy(bp, data->reg_num & 0x1f, &mii_regval);
- spin_unlock_irq(&bp->lock);
+ struct b44 *bp = netdev_priv(dev);
+
+ epause->autoneg =
+ (bp->flags & B44_FLAG_PAUSE_AUTO) != 0;
+ epause->rx_pause =
+ (bp->flags & B44_FLAG_RX_PAUSE) != 0;
+ epause->tx_pause =
+ (bp->flags & B44_FLAG_TX_PAUSE) != 0;
+}
- data->val_out = mii_regval;
+static int b44_set_pauseparam(struct net_device *dev,
+ struct ethtool_pauseparam *epause)
+{
+ struct b44 *bp = netdev_priv(dev);
- return err;
+ spin_lock_irq(&bp->lock);
+ if (epause->autoneg)
+ bp->flags |= B44_FLAG_PAUSE_AUTO;
+ else
+ bp->flags &= ~B44_FLAG_PAUSE_AUTO;
+ if (epause->rx_pause)
+ bp->flags |= B44_FLAG_RX_PAUSE;
+ else
+ bp->flags &= ~B44_FLAG_RX_PAUSE;
+ if (epause->tx_pause)
+ bp->flags |= B44_FLAG_TX_PAUSE;
+ else
+ bp->flags &= ~B44_FLAG_TX_PAUSE;
+ if (bp->flags & B44_FLAG_PAUSE_AUTO) {
+ b44_halt(bp);
+ b44_init_rings(bp);
+ b44_init_hw(bp);
+ } else {
+ __b44_set_flow_ctrl(bp, bp->flags);
}
+ spin_unlock_irq(&bp->lock);
+
+ b44_enable_ints(bp);
+
+ return 0;
+}
- case SIOCSMIIREG:
- if (!capable(CAP_NET_ADMIN))
- return -EPERM;
+static struct ethtool_ops b44_ethtool_ops = {
+ .get_drvinfo = b44_get_drvinfo,
+ .get_settings = b44_get_settings,
+ .set_settings = b44_set_settings,
+ .nway_reset = b44_nway_reset,
+ .get_link = ethtool_op_get_link,
+ .get_ringparam = b44_get_ringparam,
+ .set_ringparam = b44_set_ringparam,
+ .get_pauseparam = b44_get_pauseparam,
+ .set_pauseparam = b44_set_pauseparam,
+ .get_msglevel = b44_get_msglevel,
+ .set_msglevel = b44_set_msglevel,
+};
- spin_lock_irq(&bp->lock);
- err = b44_writephy(bp, data->reg_num & 0x1f, data->val_in);
- spin_unlock_irq(&bp->lock);
+static int b44_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
+{
+ struct mii_ioctl_data *data = if_mii(ifr);
+ struct b44 *bp = netdev_priv(dev);
+ int err;
- return err;
+ spin_lock_irq(&bp->lock);
+ err = generic_mii_ioctl(&bp->mii_if, data, cmd, NULL);
+ spin_unlock_irq(&bp->lock);
- default:
- /* do nothing */
- break;
- };
- return -EOPNOTSUPP;
+ return err;
}
/* Read 128-bytes of EEPROM. */
/* No interesting netdevice features in this card... */
dev->features |= 0;
- bp = dev->priv;
+ bp = netdev_priv(dev);
bp->pdev = pdev;
bp->dev = dev;
if (b44_debug >= 0)
spin_lock_init(&bp->lock);
- bp->regs = (unsigned long) ioremap(b44reg_base, b44reg_len);
+ bp->regs = ioremap(b44reg_base, b44reg_len);
if (bp->regs == 0UL) {
printk(KERN_ERR PFX "Cannot map device registers, "
"aborting.\n");
dev->watchdog_timeo = B44_TX_TIMEOUT;
dev->change_mtu = b44_change_mtu;
dev->irq = pdev->irq;
+ SET_ETHTOOL_OPS(dev, &b44_ethtool_ops);
err = b44_get_invariants(bp);
if (err) {
goto err_out_iounmap;
}
+ bp->mii_if.dev = dev;
+ bp->mii_if.mdio_read = b44_mii_read;
+ bp->mii_if.mdio_write = b44_mii_write;
+ bp->mii_if.phy_id = bp->phy_addr;
+ bp->mii_if.phy_id_mask = 0x1f;
+ bp->mii_if.reg_num_mask = 0x1f;
+
/* By default, advertise all speed/duplex settings. */
bp->flags |= (B44_FLAG_ADV_10HALF | B44_FLAG_ADV_10FULL |
B44_FLAG_ADV_100HALF | B44_FLAG_ADV_100FULL);
return 0;
err_out_iounmap:
- iounmap((void *) bp->regs);
+ iounmap(bp->regs);
err_out_free_dev:
free_netdev(dev);
struct net_device *dev = pci_get_drvdata(pdev);
if (dev) {
+ struct b44 *bp = netdev_priv(dev);
+
unregister_netdev(dev);
- iounmap((void *) ((struct b44 *)(dev->priv))->regs);
+ iounmap(bp->regs);
free_netdev(dev);
pci_release_regions(pdev);
pci_disable_device(pdev);
struct net_device *dev = pci_get_drvdata(pdev);
struct b44 *bp = dev->priv;
+ pci_restore_state(pdev, bp->pci_cfg_state);
+
if (!netif_running(dev))
return 0;
- pci_restore_state(pdev, bp->pci_cfg_state);
-
spin_lock_irq(&bp->lock);
b44_init_rings(bp);