* Don't access any register before this point!
*/
#ifdef __BIG_ENDIAN
- writel(readl(®s->HostCtrl) | NO_SWAP, ®s->HostCtrl);
+ writel(readl(&rrpriv->regs->HostCtrl) | NO_SWAP,
+ &rrpriv->regs->HostCtrl);
#endif
/*
* Need to add a case for little-endian 64-bit hosts here.
for (i = 0; i < TX_RING_ENTRIES; i++) {
rrpriv->tx_ring[i].size = 0;
set_rraddr(&rrpriv->tx_ring[i].addr, 0);
- rrpriv->tx_skbuff[i] = 0;
+ rrpriv->tx_skbuff[i] = NULL;
}
rrpriv->info->tx_ctrl.entry_size = sizeof(struct tx_desc);
rrpriv->info->tx_ctrl.entries = TX_RING_ENTRIES;
rrpriv->rx_ring[i].size = 0;
set_rraddr(&rrpriv->rx_ring[i].addr, 0);
dev_kfree_skb(skb);
- rrpriv->rx_skbuff[i] = 0;
+ rrpriv->rx_skbuff[i] = NULL;
}
}
return ecode;
if (rrpriv->tx_skbuff[cons]){
len = min_t(int, 0x80, rrpriv->tx_skbuff[cons]->len);
printk("skbuff for cons %i is valid - dumping data (0x%x bytes - skbuff len 0x%x)\n", cons, len, rrpriv->tx_skbuff[cons]->len);
- printk("mode 0x%x, size 0x%x,\n phys %08x, skbuff-addr %08lx, truesize 0x%x\n",
+ printk("mode 0x%x, size 0x%x,\n phys %08Lx, skbuff-addr %08lx, truesize 0x%x\n",
rrpriv->tx_ring[cons].mode,
rrpriv->tx_ring[cons].size,
- rrpriv->tx_ring[cons].addr.addrlo,
+ (unsigned long long) rrpriv->tx_ring[cons].addr.addrlo,
(unsigned long)rrpriv->tx_skbuff[cons]->data,
(unsigned int)rrpriv->tx_skbuff[cons]->truesize);
for (i = 0; i < len; i++){
printk("dumping TX ring info:\n");
for (i = 0; i < TX_RING_ENTRIES; i++)
- printk("mode 0x%x, size 0x%x, phys-addr %08x\n",
+ printk("mode 0x%x, size 0x%x, phys-addr %08Lx\n",
rrpriv->tx_ring[i].mode,
rrpriv->tx_ring[i].size,
- rrpriv->tx_ring[i].addr.addrlo);
+ (unsigned long long) rrpriv->tx_ring[i].addr.addrlo);
}