Merge to Fedora kernel-2.6.18-1.2224_FC5 patched with stable patch-2.6.18.1-vs2.0...

[linux-2.6.git] / drivers / net / sis900.h

diff --git a/drivers/net/sis900.h b/drivers/net/sis900.h
index 763c7a3..4834e3a 100644 (file)
--- a/drivers/net/sis900.h
+++ b/drivers/net/sis900.h
@@ -77,7 +77,7 @@ enum sis900_interrupt_enable_reigster_bits {
        IE = 0x00000001
 };
 
-/* maximum dma burst fro transmission and receive*/
+/* maximum dma burst for transmission and receive */
 #define MAX_DMA_RANGE  7       /* actually 0 means MAXIMUM !! */
 #define TxMXDMA_shift          20
 #define RxMXDMA_shift    20
@@ -86,7 +86,7 @@ enum sis900_tx_rx_dma{
        DMA_BURST_512 = 0,      DMA_BURST_64 = 5
 };
 
-/* transmit FIFO threshholds */
+/* transmit FIFO thresholds */
 #define TX_FILL_THRESH   16    /* 1/4 FIFO size */
 #define TxFILLT_shift          8
 #define TxDRNT_shift           0
@@ -140,7 +140,51 @@ enum sis96x_eeprom_command {
        EEREQ = 0x00000400, EEDONE = 0x00000200, EEGNT = 0x00000100
 };
 
-/* Manamgement Data I/O (mdio) frame */
+/* PCI Registers */
+enum sis900_pci_registers {
+       CFGPMC   = 0x40,
+       CFGPMCSR = 0x44
+};
+
+/* Power management capabilities bits */
+enum sis900_cfgpmc_register_bits {
+       PMVER   = 0x00070000, 
+       DSI     = 0x00100000,
+       PMESP   = 0xf8000000
+};
+
+enum sis900_pmesp_bits {
+       PME_D0 = 0x1,
+       PME_D1 = 0x2,
+       PME_D2 = 0x4,
+       PME_D3H = 0x8,
+       PME_D3C = 0x10
+};
+
+/* Power management control/status bits */
+enum sis900_cfgpmcsr_register_bits {
+       PMESTS = 0x00004000,
+       PME_EN = 0x00000100, // Power management enable
+       PWR_STA = 0x00000003 // Current power state
+};
+
+/* Wake-on-LAN support. */
+enum sis900_power_management_control_register_bits {
+       LINKLOSS  = 0x00000001,
+       LINKON    = 0x00000002,
+       MAGICPKT  = 0x00000400,
+       ALGORITHM = 0x00000800,
+       FRM1EN    = 0x00100000,
+       FRM2EN    = 0x00200000,
+       FRM3EN    = 0x00400000,
+       FRM1ACS   = 0x01000000,
+       FRM2ACS   = 0x02000000,
+       FRM3ACS   = 0x04000000,
+       WAKEALL   = 0x40000000,
+       GATECLK   = 0x80000000
+};
+
+/* Management Data I/O (mdio) frame */
 #define MIIread         0x6000
 #define MIIwrite        0x5002
 #define MIIpmdShift     7
@@ -266,8 +310,14 @@ enum sis630_revision_id {
 #define CRC_SIZE                4
 #define MAC_HEADER_SIZE         14
 
-#define TX_BUF_SIZE     1536
-#define RX_BUF_SIZE     1536
+#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
+#define MAX_FRAME_SIZE  (1518 + 4)
+#else
+#define MAX_FRAME_SIZE  1518
+#endif /* CONFIG_VLAN_802_1Q */
+
+#define TX_BUF_SIZE     (MAX_FRAME_SIZE+18)
+#define RX_BUF_SIZE     (MAX_FRAME_SIZE+18)
 
 #define NUM_TX_DESC     16             /* Number of Tx descriptor registers. */
 #define NUM_RX_DESC     16             /* Number of Rx descriptor registers. */