Fedora kernel-2.6.17-1.2142_FC4 patched with stable patch-2.6.17.4-vs2.0.2-rc26.diff

[linux-2.6.git] / drivers / net / sk_mca.h

diff --git a/drivers/net/sk_mca.h b/drivers/net/sk_mca.h
index da43d5b..d6fa182 100644 (file)
--- a/drivers/net/sk_mca.h
+++ b/drivers/net/sk_mca.h
@@ -1,20 +1,8 @@
-#include <linux/version.h>
-
 #ifndef _SK_MCA_INCLUDE_
 #define _SK_MCA_INCLUDE_
 
 #ifdef _SK_MCA_DRIVER_
 
-/* version-dependent functions/structures */
-
-#define SKMCA_READB(addr) isa_readb(addr)
-#define SKMCA_READW(addr) isa_readw(addr)
-#define SKMCA_WRITEB(data, addr) isa_writeb(data, addr)
-#define SKMCA_WRITEW(data, addr) isa_writew(data, addr)
-#define SKMCA_TOIO(dest, src, len) isa_memcpy_toio(dest, src, len)
-#define SKMCA_FROMIO(dest, src, len) isa_memcpy_fromio(dest, src, len)
-#define SKMCA_SETIO(dest, val, len) isa_memset_io(dest, val, len)
-
 /* Adapter ID's */
 #define SKNET_MCA_ID 0x6afd
 #define SKNET_JUNIOR_MCA_ID 0x6be9
@@ -29,10 +17,11 @@ typedef enum { Media_10Base2, Media_10BaseT,
 /* private structure */
 typedef struct {
        unsigned int slot;      /* MCA-Slot-#                       */
-       unsigned int macbase;   /* base address of MAC address PROM */
-       unsigned int ioregaddr; /* address of I/O-register (Lo)     */
-       unsigned int ctrladdr;  /* address of control/stat register */
-       unsigned int cmdaddr;   /* address of I/O-command register  */
+       void __iomem *base;
+       void __iomem *macbase;  /* base address of MAC address PROM */
+       void __iomem *ioregaddr;/* address of I/O-register (Lo)     */
+       void __iomem *ctrladdr; /* address of control/stat register */
+       void __iomem *cmdaddr;  /* address of I/O-command register  */
        int nextrx;             /* index of next RX descriptor to
                                   be read                          */
        int nexttxput;          /* index of next free TX descriptor */
@@ -100,7 +89,7 @@ typedef struct {
 #define CSR3_ALE_HIGH      0   /* Bit 1 = 0 -> ALE asserted high    */
 #define CSR3_ALE_LOW       2   /* Bit 1 = 1 -> ALE asserted low     */
 #define CSR3_BSWAP_OFF     0   /* Bit 2 = 0 -> no byte swap         */
-#define CSR3_BSWAP_ON      0   /* Bit 2 = 1 -> byte swap            */
+#define CSR3_BSWAP_ON      4   /* Bit 2 = 1 -> byte swap            */
 
 /* LANCE structures */