#include <linux/sched.h> /* for jiffies, HZ, etc. */
#include <linux/cycx_drv.h> /* API definitions */
#include <linux/cycx_cfm.h> /* CYCX firmware module definitions */
-#include <linux/delay.h> /* udelay */
+#include <linux/delay.h> /* udelay, msleep_interruptible */
#include <asm/io.h> /* read[wl], write[wl], ioremap, iounmap */
#define MOD_VERSION 0
static int load_cyc2x(struct cycx_hw *hw, struct cycx_firmware *cfm, u32 len);
static void cycx_bootcfg(struct cycx_hw *hw);
-static int reset_cyc2x(void *addr);
-static int detect_cyc2x(void *addr);
+static int reset_cyc2x(void __iomem *addr);
+static int detect_cyc2x(void __iomem *addr);
/* Miscellaneous functions */
-static void delay_cycx(int sec);
static int get_option_index(long *optlist, long optval);
static u16 checksum(u8 *buf, u32 len);
* < 0 error.
* Context: process */
-int __init cycx_drv_init(void)
+static int __init cycx_drv_init(void)
{
printk(KERN_INFO "%s v%u.%u %s\n", fullname, MOD_VERSION, MOD_RELEASE,
copyright);
/* Module 'remove' entry point.
* o release all remaining system resources */
-void cycx_drv_cleanup(void)
+static void cycx_drv_cleanup(void)
{
}
* Return: 0 ok.
* < 0 error */
EXPORT_SYMBOL(cycx_setup);
-int cycx_setup(struct cycx_hw *hw, void *cfm, u32 len)
+int cycx_setup(struct cycx_hw *hw, void *cfm, u32 len, unsigned long dpmbase)
{
- long dpmbase = (long)hw->dpmbase;
int err;
/* Verify IRQ configuration options */
}
/* Enable interrupt generation. */
-EXPORT_SYMBOL(cycx_inten);
-void cycx_inten(struct cycx_hw *hw)
+static void cycx_inten(struct cycx_hw *hw)
{
writeb(0, hw->dpmbase);
}
* o Set exec flag.
* o Busy-wait until flag is reset. */
EXPORT_SYMBOL(cycx_exec);
-int cycx_exec(void *addr)
+int cycx_exec(void __iomem *addr)
{
u16 i = 0;
/* wait till addr content is zeroed */
/* Load Aux Routines */
/* Reset board hardware.
return 1 if memory exists at addr and 0 if not. */
-static int memory_exists(void *addr)
+static int memory_exists(void __iomem *addr)
{
int tries = 0;
if (readw(addr + 0x10) == TEST_PATTERN)
return 1;
- delay_cycx(1);
+ msleep_interruptible(1 * 1000);
}
return 0;
}
/* Load reset code. */
-static void reset_load(void *addr, u8 *buffer, u32 cnt)
+static void reset_load(void __iomem *addr, u8 *buffer, u32 cnt)
{
- void *pt_code = addr + RESET_OFFSET;
+ void __iomem *pt_code = addr + RESET_OFFSET;
u16 i; /*, j; */
for (i = 0 ; i < cnt ; i++) {
/* Load buffer using boot interface.
* o copy data from buffer to Cyclom-X memory
* o wait for reset code to copy it to right portion of memory */
-static int buffer_load(void *addr, u8 *buffer, u32 cnt)
+static int buffer_load(void __iomem *addr, u8 *buffer, u32 cnt)
{
memcpy_toio(addr + DATA_OFFSET, buffer, cnt);
writew(GEN_BOOT_DAT, addr + CMD_OFFSET);
}
/* Set up entry point and kick start Cyclom-X CPU. */
-static void cycx_start(void *addr)
+static void cycx_start(void __iomem *addr)
{
/* put in 0x30 offset the jump instruction to the code entry point */
writeb(0xea, addr + 0x30);
}
/* Load and boot reset code. */
-static void cycx_reset_boot(void *addr, u8 *code, u32 len)
+static void cycx_reset_boot(void __iomem *addr, u8 *code, u32 len)
{
- void *pt_start = addr + START_OFFSET;
+ void __iomem *pt_start = addr + START_OFFSET;
writeb(0xea, pt_start++); /* jmp to f000:3f00 */
writeb(0x00, pt_start++);
/* 80186 was in hold, go */
writeb(0, addr + START_CPU);
- delay_cycx(1);
+ msleep_interruptible(1 * 1000);
}
/* Load data.bin file through boot (reset) interface. */
-static int cycx_data_boot(void *addr, u8 *code, u32 len)
+static int cycx_data_boot(void __iomem *addr, u8 *code, u32 len)
{
- void *pt_boot_cmd = addr + CMD_OFFSET;
+ void __iomem *pt_boot_cmd = addr + CMD_OFFSET;
u32 i;
/* boot buffer lenght */
/* Load code.bin file through boot (reset) interface. */
-static int cycx_code_boot(void *addr, u8 *code, u32 len)
+static int cycx_code_boot(void __iomem *addr, u8 *code, u32 len)
{
- void *pt_boot_cmd = addr + CMD_OFFSET;
+ void __iomem *pt_boot_cmd = addr + CMD_OFFSET;
u32 i;
/* boot buffer lenght */
u8 *reset_image,
*data_image,
*code_image;
- void *pt_cycld = hw->dpmbase + 0x400;
+ void __iomem *pt_cycld = hw->dpmbase + 0x400;
u16 cksum;
/* Announce */
cycx_reset_boot(hw->dpmbase, reset_image, img_hdr->reset_size);
/* reset is waiting for boot */
writew(GEN_POWER_ON, pt_cycld);
- delay_cycx(1);
+ msleep_interruptible(1 * 1000);
for (j = 0 ; j < 3 ; j++)
if (!readw(pt_cycld))
goto reset_loaded;
else
- delay_cycx(1);
+ msleep_interruptible(1 * 1000);
}
printk(KERN_ERR "%s: reset not started.\n", modname);
/* Arthur Ganzert's tip: wait a while after the firmware loading...
seg abr 26 17:17:12 EST 1999 - acme */
- delay_cycx(7);
+ msleep_interruptible(7 * 1000);
printk(KERN_INFO "%s: firmware loaded!\n", modname);
/* enable interrupts */
* Return 1 if detected o.k. or 0 if failed.
* Note: This test is destructive! Adapter will be left in shutdown
* state after the test. */
-static int detect_cyc2x(void *addr)
+static int detect_cyc2x(void __iomem *addr)
{
reset_cyc2x(addr);
}
/* Reset adapter's CPU. */
-static int reset_cyc2x(void *addr)
+static int reset_cyc2x(void __iomem *addr)
{
writeb(0, addr + RST_ENABLE);
- delay_cycx(2);
+ msleep_interruptible(2 * 1000);
writeb(0, addr + RST_DISABLE);
- delay_cycx(2);
+ msleep_interruptible(2 * 1000);
return memory_exists(addr);
}
-/* Delay */
-static void delay_cycx(int sec)
-{
- set_current_state(TASK_INTERRUPTIBLE);
- schedule_timeout(sec * HZ);
-}
-
/* Calculate 16-bit CRC using CCITT polynomial. */
static u16 checksum(u8 *buf, u32 len)
{
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