* find the Hot Plug Resource Table in the specified region of memory.
*
*/
-static void *detect_HRT_floating_pointer(void *begin, void *end)
+static void __iomem *detect_HRT_floating_pointer(void __iomem *begin, void __iomem *end)
{
- void *fp;
- void *endp;
+ void __iomem *fp;
+ void __iomem *endp;
u8 temp1, temp2, temp3, temp4;
int status = 0;
*/
int cpqhp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
{
- int rc;
- u16 temp_word;
- struct pci_dev fakedev;
- struct pci_bus fakebus;
+ int rc = 0;
if (cpqhp_legacy_mode) {
- fakedev.devfn = dev_num << 3;
- fakedev.bus = &fakebus;
- fakebus.number = bus_num;
+ struct pci_dev *fakedev;
+ struct pci_bus *fakebus;
+ u16 temp_word;
+
+ fakedev = kmalloc(sizeof(*fakedev), GFP_KERNEL);
+ fakebus = kmalloc(sizeof(*fakebus), GFP_KERNEL);
+ if (!fakedev || !fakebus) {
+ kfree(fakedev);
+ kfree(fakebus);
+ return -ENOMEM;
+ }
+
+ fakedev->devfn = dev_num << 3;
+ fakedev->bus = fakebus;
+ fakebus->number = bus_num;
dbg("%s: dev %d, bus %d, pin %d, num %d\n",
__FUNCTION__, dev_num, bus_num, int_pin, irq_num);
- rc = pcibios_set_irq_routing(&fakedev, int_pin - 0x0a, irq_num);
+ rc = pcibios_set_irq_routing(fakedev, int_pin - 0x0a, irq_num);
+ kfree(fakedev);
+ kfree(fakebus);
dbg("%s: rc %d\n", __FUNCTION__, rc);
if (!rc)
return !rc;
// This should only be for x86 as it sets the Edge Level Control Register
outb((u8) (temp_word & 0xFF), 0x4d0);
outb((u8) ((temp_word & 0xFF00) >> 8), 0x4d1);
+ rc = 0;
}
- return 0;
+ return rc;
}
static int PCI_ScanBusForNonBridge(struct controller *ctrl, u8 bus_num, u8 * dev_num)
{
- u8 tdevice;
+ u16 tdevice;
u32 work;
u8 tbus;
sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
// Make sure I got at least one entry
if (len == 0) {
- if (PCIIRQRoutingInfoLength != NULL)
- kfree(PCIIRQRoutingInfoLength );
+ kfree(PCIIRQRoutingInfoLength );
return -1;
}
ctrl->pci_bus->number = tbus;
pci_bus_read_config_dword (ctrl->pci_bus, *dev_num, PCI_VENDOR_ID, &work);
if (!nobridge || (work == 0xffffffff)) {
- if (PCIIRQRoutingInfoLength != NULL)
- kfree(PCIIRQRoutingInfoLength );
+ kfree(PCIIRQRoutingInfoLength );
return 0;
}
dbg("Scan bus for Non Bridge: bus %d\n", tbus);
if (PCI_ScanBusForNonBridge(ctrl, tbus, dev_num) == 0) {
*bus_num = tbus;
- if (PCIIRQRoutingInfoLength != NULL)
- kfree(PCIIRQRoutingInfoLength );
+ kfree(PCIIRQRoutingInfoLength );
return 0;
}
} else {
- if (PCIIRQRoutingInfoLength != NULL)
- kfree(PCIIRQRoutingInfoLength );
+ kfree(PCIIRQRoutingInfoLength );
return 0;
}
}
}
- if (PCIIRQRoutingInfoLength != NULL)
- kfree(PCIIRQRoutingInfoLength );
+ kfree(PCIIRQRoutingInfoLength );
return -1;
}
*
* returns 0 if success
*/
-int cpqhp_find_available_resources (struct controller *ctrl, void *rom_start)
+int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_start)
{
u8 temp;
u8 populated_slot;
u8 bridged_slot;
- void *one_slot;
+ void __iomem *one_slot;
+ void __iomem *rom_resource_table;
struct pci_func *func = NULL;
int i = 10, index;
u32 temp_dword, rc;
struct pci_resource *p_mem_node;
struct pci_resource *io_node;
struct pci_resource *bus_node;
- void *rom_resource_table;
rom_resource_table = detect_HRT_floating_pointer(rom_start, rom_start+0xffff);
dbg("rom_resource_table = %p\n", rom_resource_table);