#include <linux/wait.h>
#include <linux/time.h>
+#include <linux/delay.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/smp_lock.h>
#include <linux/init.h>
+#include <linux/mutex.h>
+
#include "ibmphp.h"
-static int to_debug = FALSE;
+static int to_debug = 0;
#define debug_polling(fmt, arg...) do { if (to_debug) debug (fmt, arg); } while (0)
//----------------------------------------------------------------------------
#define WPG_I2C_OR 0x2000 // I2C OR operation
//----------------------------------------------------------------------------
-// Command set for I2C Master Operation Setup Regisetr
+// Command set for I2C Master Operation Setup Register
//----------------------------------------------------------------------------
#define WPG_READATADDR_MASK 0x00010000 // read,bytes,I2C shifted,index
#define WPG_WRITEATADDR_MASK 0x40010000 // write,bytes,I2C shifted,index
//----------------------------------------------------------------------------
// macro utilities
//----------------------------------------------------------------------------
-// if bits 20,22,25,26,27,29,30 are OFF return TRUE
-#define HPC_I2CSTATUS_CHECK(s) ((u8)((s & 0x00000A76) ? FALSE : TRUE))
+// if bits 20,22,25,26,27,29,30 are OFF return 1
+#define HPC_I2CSTATUS_CHECK(s) ((u8)((s & 0x00000A76) ? 0 : 1))
//----------------------------------------------------------------------------
// global variables
//----------------------------------------------------------------------------
static int ibmphp_shutdown;
static int tid_poll;
-static struct semaphore sem_hpcaccess; // lock access to HPC
+static struct mutex sem_hpcaccess; // lock access to HPC
static struct semaphore semOperations; // lock all operations and
// access to data structures
static struct semaphore sem_exit; // make sure polling thread goes away
//----------------------------------------------------------------------------
// local function prototypes
//----------------------------------------------------------------------------
-static u8 i2c_ctrl_read (struct controller *, void *, u8);
-static u8 i2c_ctrl_write (struct controller *, void *, u8, u8);
+static u8 i2c_ctrl_read (struct controller *, void __iomem *, u8);
+static u8 i2c_ctrl_write (struct controller *, void __iomem *, u8, u8);
static u8 hpc_writecmdtoindex (u8, u8);
static u8 hpc_readcmdtoindex (u8, u8);
static void get_hpc_access (void);
static int process_changeinstatus (struct slot *, struct slot *);
static int process_changeinlatch (u8, u8, struct controller *);
static int hpc_poll_thread (void *);
-static int hpc_wait_ctlr_notworking (int, struct controller *, void *, u8 *);
+static int hpc_wait_ctlr_notworking (int, struct controller *, void __iomem *, u8 *);
//----------------------------------------------------------------------------
{
debug ("%s - Entry\n", __FUNCTION__);
- init_MUTEX (&sem_hpcaccess);
+ mutex_init(&sem_hpcaccess);
init_MUTEX (&semOperations);
init_MUTEX_LOCKED (&sem_exit);
- to_debug = FALSE;
- ibmphp_shutdown = FALSE;
+ to_debug = 0;
+ ibmphp_shutdown = 0;
tid_poll = 0;
debug ("%s - Exit\n", __FUNCTION__);
* Action: read from HPC over I2C
*
*---------------------------------------------------------------------*/
-static u8 i2c_ctrl_read (struct controller *ctlr_ptr, void *WPGBbar, u8 index)
+static u8 i2c_ctrl_read (struct controller *ctlr_ptr, void __iomem *WPGBbar, u8 index)
{
u8 status;
int i;
- void *wpg_addr; // base addr + offset
+ void __iomem *wpg_addr; // base addr + offset
unsigned long wpg_data; // data to/from WPG LOHI format
unsigned long ultemp;
unsigned long data; // actual data HILO format
// READ - step 4 : wait until start operation bit clears
i = CMD_COMPLETE_TOUT_SEC;
while (i) {
- long_delay (1 * HZ / 100);
+ msleep(10);
wpg_addr = WPGBbar + WPG_I2CMCNTL_OFFSET;
wpg_data = readl (wpg_addr);
data = swab32 (wpg_data);
// READ - step 5 : read I2C status register
i = CMD_COMPLETE_TOUT_SEC;
while (i) {
- long_delay (1 * HZ / 100);
+ msleep(10);
wpg_addr = WPGBbar + WPG_I2CSTAT_OFFSET;
wpg_data = readl (wpg_addr);
data = swab32 (wpg_data);
*
* Return 0 or error codes
*---------------------------------------------------------------------*/
-static u8 i2c_ctrl_write (struct controller *ctlr_ptr, void *WPGBbar, u8 index, u8 cmd)
+static u8 i2c_ctrl_write (struct controller *ctlr_ptr, void __iomem *WPGBbar, u8 index, u8 cmd)
{
u8 rc;
- void *wpg_addr; // base addr + offset
+ void __iomem *wpg_addr; // base addr + offset
unsigned long wpg_data; // data to/from WPG LOHI format
unsigned long ultemp;
unsigned long data; // actual data HILO format
// WRITE - step 4 : wait until start operation bit clears
i = CMD_COMPLETE_TOUT_SEC;
while (i) {
- long_delay (1 * HZ / 100);
+ msleep(10);
wpg_addr = WPGBbar + WPG_I2CMCNTL_OFFSET;
wpg_data = readl (wpg_addr);
data = swab32 (wpg_data);
// WRITE - step 5 : read I2C status register
i = CMD_COMPLETE_TOUT_SEC;
while (i) {
- long_delay (1 * HZ / 100);
+ msleep(10);
wpg_addr = WPGBbar + WPG_I2CSTAT_OFFSET;
wpg_data = readl (wpg_addr);
data = swab32 (wpg_data);
return rc;
}
-static u8 ctrl_read (struct controller *ctlr, void *base, u8 offset)
+static u8 ctrl_read (struct controller *ctlr, void __iomem *base, u8 offset)
{
u8 rc;
switch (ctlr->ctlr_type) {
return rc;
}
-static u8 ctrl_write (struct controller *ctlr, void *base, u8 offset, u8 data)
+static u8 ctrl_write (struct controller *ctlr, void __iomem *base, u8 offset, u8 data)
{
u8 rc = 0;
switch (ctlr->ctlr_type) {
*
* Action: issue a READ command to HPC
*
-* Input: pslot - can not be NULL for READ_ALLSTAT
+* Input: pslot - cannot be NULL for READ_ALLSTAT
* pstatus - can be NULL for READ_ALLSTAT
*
* Return 0 or error codes
*---------------------------------------------------------------------*/
int ibmphp_hpc_readslot (struct slot * pslot, u8 cmd, u8 * pstatus)
{
- void *wpg_bbar = NULL;
+ void __iomem *wpg_bbar = NULL;
struct controller *ctlr_ptr;
struct list_head *pslotlist;
u8 index, status;
// remove physical to logical address mapping
if ((ctlr_ptr->ctlr_type == 2) || (ctlr_ptr->ctlr_type == 4))
- iounmap (wpg_bbar);
+ iounmap (wpg_bbar);
free_hpc_access ();
*---------------------------------------------------------------------*/
int ibmphp_hpc_writeslot (struct slot * pslot, u8 cmd)
{
- void *wpg_bbar = NULL;
+ void __iomem *wpg_bbar = NULL;
struct controller *ctlr_ptr;
u8 index, status;
int busindex;
// check controller is still not working on the command
//--------------------------------------------------------------------
timeout = CMD_COMPLETE_TOUT_SEC;
- done = FALSE;
+ done = 0;
while (!done) {
rc = hpc_wait_ctlr_notworking (HPC_CTLR_WORKING_TOUT, ctlr_ptr, wpg_bbar,
&status);
if (!rc) {
if (NEEDTOCHECK_CMDSTATUS (cmd)) {
if (CTLR_FINISHED (status) == HPC_CTLR_FINISHED_YES)
- done = TRUE;
+ done = 1;
} else
- done = TRUE;
+ done = 1;
}
if (!done) {
- long_delay (1 * HZ);
+ msleep(1000);
if (timeout < 1) {
- done = TRUE;
+ done = 1;
err ("%s - Error command complete timeout\n", __FUNCTION__);
rc = -EFAULT;
} else
// remove physical to logical address mapping
if ((ctlr_ptr->ctlr_type == 2) || (ctlr_ptr->ctlr_type == 4))
- iounmap (wpg_bbar);
+ iounmap (wpg_bbar);
free_hpc_access ();
debug_polling ("%s - Exit rc[%d]\n", __FUNCTION__, rc);
*---------------------------------------------------------------------*/
static void get_hpc_access (void)
{
- down (&sem_hpcaccess);
+ mutex_lock(&sem_hpcaccess);
}
/*----------------------------------------------------------------------
*---------------------------------------------------------------------*/
void free_hpc_access (void)
{
- up (&sem_hpcaccess);
+ mutex_unlock(&sem_hpcaccess);
}
/*----------------------------------------------------------------------
void ibmphp_lock_operations (void)
{
down (&semOperations);
- to_debug = TRUE;
+ to_debug = 1;
}
/*----------------------------------------------------------------------
{
debug ("%s - Entry\n", __FUNCTION__);
up (&semOperations);
- to_debug = FALSE;
+ to_debug = 0;
debug ("%s - Exit\n", __FUNCTION__);
}
if (ibmphp_shutdown)
break;
- /* try to get the lock to do some kind of harware access */
+ /* try to get the lock to do some kind of hardware access */
down (&semOperations);
switch (poll_state) {
case POLL_SLEEP:
/* don't sleep with a lock on the hardware */
up (&semOperations);
- long_delay (POLL_INTERVAL_SEC * HZ);
+ msleep(POLL_INTERVAL_SEC * 1000);
if (ibmphp_shutdown)
break;
poll_state = POLL_LATCH_REGISTER;
break;
}
- /* give up the harware semaphore */
+ /* give up the hardware semaphore */
up (&semOperations);
/* sleep for a short time just for good measure */
- set_current_state (TASK_INTERRUPTIBLE);
- schedule_timeout (HZ/10);
+ msleep(100);
}
up (&sem_exit);
debug ("%s - Exit\n", __FUNCTION__);
{
u8 status;
int rc = 0;
- u8 disable = FALSE;
- u8 update = FALSE;
+ u8 disable = 0;
+ u8 update = 0;
debug ("process_changeinstatus - Entry pslot[%p], poldslot[%p]\n", pslot, poldslot);
// bit 0 - HPC_SLOT_POWER
if ((pslot->status & 0x01) != (poldslot->status & 0x01))
- update = TRUE;
+ update = 1;
// bit 1 - HPC_SLOT_CONNECT
// ignore
// bit 2 - HPC_SLOT_ATTN
if ((pslot->status & 0x04) != (poldslot->status & 0x04))
- update = TRUE;
+ update = 1;
// bit 3 - HPC_SLOT_PRSNT2
// bit 4 - HPC_SLOT_PRSNT1
if (((pslot->status & 0x08) != (poldslot->status & 0x08))
|| ((pslot->status & 0x10) != (poldslot->status & 0x10)))
- update = TRUE;
+ update = 1;
// bit 5 - HPC_SLOT_PWRGD
if ((pslot->status & 0x20) != (poldslot->status & 0x20))
// OFF -> ON: ignore, ON -> OFF: disable slot
if ((poldslot->status & 0x20) && (SLOT_CONNECT (poldslot->status) == HPC_SLOT_CONNECTED) && (SLOT_PRESENT (poldslot->status)))
- disable = TRUE;
+ disable = 1;
// bit 6 - HPC_SLOT_BUS_SPEED
// ignore
// bit 7 - HPC_SLOT_LATCH
if ((pslot->status & 0x80) != (poldslot->status & 0x80)) {
- update = TRUE;
+ update = 1;
// OPEN -> CLOSE
if (pslot->status & 0x80) {
if (SLOT_PWRGD (pslot->status)) {
// power goes on and off after closing latch
// check again to make sure power is still ON
- long_delay (1 * HZ);
+ msleep(1000);
rc = ibmphp_hpc_readslot (pslot, READ_SLOTSTATUS, &status);
if (SLOT_PWRGD (status))
- update = TRUE;
+ update = 1;
else // overwrite power in pslot to OFF
pslot->status &= ~HPC_SLOT_POWER;
}
// CLOSE -> OPEN
else if ((SLOT_PWRGD (poldslot->status) == HPC_SLOT_PWRGD_GOOD)
&& (SLOT_CONNECT (poldslot->status) == HPC_SLOT_CONNECTED) && (SLOT_PRESENT (poldslot->status))) {
- disable = TRUE;
+ disable = 1;
}
// else - ignore
}
// bit 4 - HPC_SLOT_BLINK_ATTN
if ((pslot->ext_status & 0x08) != (poldslot->ext_status & 0x08))
- update = TRUE;
+ update = 1;
if (disable) {
debug ("process_changeinstatus - disable slot\n");
- pslot->flag = FALSE;
+ pslot->flag = 0;
rc = ibmphp_do_disable_slot (pslot);
}
debug ("%s - Entry\n", __FUNCTION__);
- tid_poll = kernel_thread (hpc_poll_thread, 0, 0);
+ tid_poll = kernel_thread (hpc_poll_thread, NULL, 0);
if (tid_poll < 0) {
err ("%s - Error, thread not started\n", __FUNCTION__);
rc = -1;
{
debug ("%s - Entry\n", __FUNCTION__);
- ibmphp_shutdown = TRUE;
+ ibmphp_shutdown = 1;
debug ("before locking operations \n");
ibmphp_lock_operations ();
debug ("after locking operations \n");
* Return 0, HPC_ERROR
* Value:
*---------------------------------------------------------------------*/
-static int hpc_wait_ctlr_notworking (int timeout, struct controller *ctlr_ptr, void *wpg_bbar,
+static int hpc_wait_ctlr_notworking (int timeout, struct controller *ctlr_ptr, void __iomem *wpg_bbar,
u8 * pstatus)
{
int rc = 0;
- u8 done = FALSE;
+ u8 done = 0;
debug_polling ("hpc_wait_ctlr_notworking - Entry timeout[%d]\n", timeout);
*pstatus = ctrl_read (ctlr_ptr, wpg_bbar, WPG_CTLR_INDEX);
if (*pstatus == HPC_ERROR) {
rc = HPC_ERROR;
- done = TRUE;
+ done = 1;
}
if (CTLR_WORKING (*pstatus) == HPC_CTLR_WORKING_NO)
- done = TRUE;
+ done = 1;
if (!done) {
- long_delay (1 * HZ);
+ msleep(1000);
if (timeout < 1) {
- done = TRUE;
+ done = 1;
err ("HPCreadslot - Error ctlr timeout\n");
rc = HPC_ERROR;
} else
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