#if defined(__i386__)
-const unsigned short base_addrs[BPP_NO] = { 0x278, 0x378, 0x3bc };
+static const unsigned short base_addrs[BPP_NO] = { 0x278, 0x378, 0x3bc };
/*
* These are for data access.
#define P_ERR_IRP 0x0002 /* RW1 1= rising edge */
#define P_ERR_IRQ_EN 0x0001 /* RW */
-unsigned long base_addrs[BPP_NO];
+static void __iomem *base_addrs[BPP_NO];
#define bpp_outb_p(data, base) sbus_writeb(data, (base) + BPP_DR)
#define bpp_inb_p(base) sbus_readb((base) + BPP_DR)
static void set_pins(unsigned short pins, unsigned minor)
{
- unsigned long base = base_addrs[minor];
+ void __iomem *base = base_addrs[minor];
unsigned char bits_tcr = 0, bits_or = 0;
if (instances[minor].direction & 0x20) bits_tcr |= P_TCR_DIR;
*/
static unsigned short get_pins(unsigned minor)
{
- unsigned long base = base_addrs[minor];
+ void __iomem *base = base_addrs[minor];
unsigned short bits = 0;
unsigned value_tcr = sbus_readb(base + BPP_TCR);
unsigned value_ir = sbus_readb(base + BPP_IR);
return 0;
}
-static spinlock_t bpp_open_lock = SPIN_LOCK_UNLOCKED;
+static DEFINE_SPINLOCK(bpp_open_lock);
/*
* Allow only one process to open the device at a time.
#if defined(__sparc__)
-static unsigned long map_bpp(struct sbus_dev *dev, int idx)
+static void __iomem *map_bpp(struct sbus_dev *dev, int idx)
{
return sbus_ioremap(&dev->resource[0], 0, BPP_SIZE, "bpp");
}
static void probeLptPort(unsigned idx)
{
- unsigned long rp = base_addrs[idx];
+ void __iomem *rp = base_addrs[idx];
__u32 csr;
char *brand;
init_timer(&instances[idx].timer_list);
instances[idx].timer_list.function = bpp_wake_up;
- if (rp == 0) return;
+ if (!rp) return;
instances[idx].present = 1;
instances[idx].enhanced = 1; /* Sure */
default:
brand = "Unknown";
}
- printk("bpp%d: %s at 0x%lx\n", idx, brand, rp);
+ printk("bpp%d: %s at %p\n", idx, brand, rp);
/*
* Leave the port in compat idle mode.