#include "aic79xx_osm.h"
#include "aic79xx_inline.h"
-#include "aic79xx_pci.h"
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0)
+struct pci_device_id
+{
+};
+#endif
static int ahd_linux_pci_dev_probe(struct pci_dev *pdev,
const struct pci_device_id *ent);
u_long *base, u_long *base2);
static int ahd_linux_pci_reserve_mem_region(struct ahd_softc *ahd,
u_long *bus_addr,
- uint8_t __iomem **maddr);
+ uint8_t **maddr);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)
static void ahd_linux_pci_dev_remove(struct pci_dev *pdev);
-/* Define the macro locally since it's different for different class of chips.
- */
-#define ID(x) \
- ID2C(x), \
- ID2C(IDIROC(x))
-
+/* We do our own ID filtering. So, grab all SCSI storage class devices. */
static struct pci_device_id ahd_linux_pci_id_table[] = {
- /* aic7901 based controllers */
- ID(ID_AHA_29320A),
- ID(ID_AHA_29320ALP),
- /* aic7902 based controllers */
- ID(ID_AHA_29320),
- ID(ID_AHA_29320B),
- ID(ID_AHA_29320LP),
- ID(ID_AHA_39320),
- ID(ID_AHA_39320_B),
- ID(ID_AHA_39320A),
- ID(ID_AHA_39320D),
- ID(ID_AHA_39320D_HP),
- ID(ID_AHA_39320D_B),
- ID(ID_AHA_39320D_B_HP),
- /* Generic chip probes for devices we don't know exactly. */
- ID16(ID_AIC7901 & ID_9005_GENERIC_MASK),
- ID(ID_AIC7901A & ID_DEV_VENDOR_MASK),
- ID16(ID_AIC7902 & ID_9005_GENERIC_MASK),
+ {
+ 0x9005, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+ PCI_CLASS_STORAGE_SCSI << 8, 0xFFFF00, 0
+ },
+ {
+ 0x9005, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+ PCI_CLASS_STORAGE_RAID << 8, 0xFFFF00, 0
+ },
{ 0 }
};
} else
ahd_list_unlock(&l);
}
+#endif /* !LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0) */
static int
ahd_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
ahd = ahd_alloc(NULL, name);
if (ahd == NULL)
return (-ENOMEM);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)
if (pci_enable_device(pdev)) {
ahd_free(ahd);
return (-ENODEV);
}
pci_set_master(pdev);
- if (sizeof(dma_addr_t) > 4) {
+ if (sizeof(bus_addr_t) > 4) {
uint64_t memsize;
- const uint64_t mask_39bit = 0x7FFFFFFFFFULL;
+ bus_addr_t mask_64bit;
+ bus_addr_t mask_39bit;
memsize = ahd_linux_get_memsize();
-
+ mask_64bit = (bus_addr_t)0xFFFFFFFFFFFFFFFFULL;
+ mask_39bit = (bus_addr_t)0x7FFFFFFFFFULL;
if (memsize >= 0x8000000000ULL
- && pci_set_dma_mask(pdev, DMA_64BIT_MASK) == 0) {
+ && ahd_pci_set_dma_mask(pdev, mask_64bit) == 0) {
ahd->flags |= AHD_64BIT_ADDRESSING;
- ahd->platform_data->hw_dma_mask = DMA_64BIT_MASK;
+ ahd->platform_data->hw_dma_mask = mask_64bit;
} else if (memsize > 0x80000000
- && pci_set_dma_mask(pdev, mask_39bit) == 0) {
+ && ahd_pci_set_dma_mask(pdev, mask_39bit) == 0) {
ahd->flags |= AHD_39BIT_ADDRESSING;
ahd->platform_data->hw_dma_mask = mask_39bit;
}
} else {
- pci_set_dma_mask(pdev, DMA_32BIT_MASK);
- ahd->platform_data->hw_dma_mask = DMA_32BIT_MASK;
+ ahd_pci_set_dma_mask(pdev, 0xFFFFFFFF);
+ ahd->platform_data->hw_dma_mask = 0xFFFFFFFF;
}
+#endif
ahd->dev_softc = pci;
error = ahd_pci_config(ahd, entry);
if (error != 0) {
ahd_free(ahd);
return (-error);
}
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)
pci_set_drvdata(pdev, ahd);
if (aic79xx_detect_complete) {
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
return (-ENODEV);
#endif
}
+#endif
return (0);
}
int
ahd_linux_pci_init(void)
{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)
return (pci_module_init(&aic79xx_pci_driver));
+#else
+ struct pci_dev *pdev;
+ u_int class;
+ int found;
+
+ /* If we don't have a PCI bus, we can't find any adapters. */
+ if (pci_present() == 0)
+ return (0);
+
+ found = 0;
+ pdev = NULL;
+ class = PCI_CLASS_STORAGE_SCSI << 8;
+ while ((pdev = pci_find_class(class, pdev)) != NULL) {
+ ahd_dev_softc_t pci;
+ int error;
+
+ pci = pdev;
+ error = ahd_linux_pci_dev_probe(pdev, /*pci_devid*/NULL);
+ if (error == 0)
+ found++;
+ }
+ return (found);
+#endif
}
void
ahd_linux_pci_reserve_io_regions(struct ahd_softc *ahd, u_long *base,
u_long *base2)
{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,0)
*base = pci_resource_start(ahd->dev_softc, 0);
/*
* This is really the 3rd bar and should be at index 2,
* bars.
*/
*base2 = pci_resource_start(ahd->dev_softc, 3);
+#else
+ *base = ahd_pci_read_config(ahd->dev_softc, AHD_PCI_IOADDR0, 4);
+ *base2 = ahd_pci_read_config(ahd->dev_softc, AHD_PCI_IOADDR1, 4);
+ *base &= PCI_BASE_ADDRESS_IO_MASK;
+ *base2 &= PCI_BASE_ADDRESS_IO_MASK;
+#endif
if (*base == 0 || *base2 == 0)
return (ENOMEM);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,4,0)
+ if (check_region(*base, 256) != 0
+ || check_region(*base2, 256) != 0)
+ return (ENOMEM);
+ request_region(*base, 256, "aic79xx");
+ request_region(*base2, 256, "aic79xx");
+#else
if (request_region(*base, 256, "aic79xx") == 0)
return (ENOMEM);
if (request_region(*base2, 256, "aic79xx") == 0) {
release_region(*base2, 256);
return (ENOMEM);
}
+#endif
return (0);
}
static int
ahd_linux_pci_reserve_mem_region(struct ahd_softc *ahd,
u_long *bus_addr,
- uint8_t __iomem **maddr)
+ uint8_t **maddr)
{
u_long start;
u_long base_page;
return (ENOMEM);
error = 0;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,0)
start = pci_resource_start(ahd->dev_softc, 1);
base_page = start & PAGE_MASK;
base_offset = start - base_page;
+#else
+ start = ahd_pci_read_config(ahd->dev_softc, PCIR_MAPS+4, 4);
+ base_offset = start & PCI_BASE_ADDRESS_MEM_MASK;
+ base_page = base_offset & PAGE_MASK;
+ base_offset -= base_page;
+#endif
if (start != 0) {
*bus_addr = start;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)
if (request_mem_region(start, 0x1000, "aic79xx") == 0)
error = ENOMEM;
+#endif
if (error == 0) {
*maddr = ioremap_nocache(base_page, base_offset + 256);
if (*maddr == NULL) {
error = ENOMEM;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)
release_mem_region(start, 0x1000);
+#endif
} else
*maddr += base_offset;
}
{
uint32_t command;
u_long base;
- uint8_t __iomem *maddr;
+ uint8_t *maddr;
int error;
/*
ahd_get_pci_bus(ahd->dev_softc),
ahd_get_pci_slot(ahd->dev_softc),
ahd_get_pci_function(ahd->dev_softc));
- iounmap(maddr);
+ iounmap((void *)((u_long)maddr & PAGE_MASK));
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)
release_mem_region(ahd->platform_data->mem_busaddr,
0x1000);
+#endif
ahd->bshs[0].maddr = NULL;
maddr = NULL;
} else
void
ahd_power_state_change(struct ahd_softc *ahd, ahd_power_state new_state)
{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,0)
pci_set_power_state(ahd->dev_softc, new_state);
+#else
+ uint32_t cap;
+ u_int cap_offset;
+
+ /*
+ * Traverse the capability list looking for
+ * the power management capability.
+ */
+ cap = 0;
+ cap_offset = ahd_pci_read_config(ahd->dev_softc,
+ PCIR_CAP_PTR, /*bytes*/1);
+ while (cap_offset != 0) {
+
+ cap = ahd_pci_read_config(ahd->dev_softc,
+ cap_offset, /*bytes*/4);
+ if ((cap & 0xFF) == 1
+ && ((cap >> 16) & 0x3) > 0) {
+ uint32_t pm_control;
+
+ pm_control = ahd_pci_read_config(ahd->dev_softc,
+ cap_offset + 4,
+ /*bytes*/4);
+ pm_control &= ~0x3;
+ pm_control |= new_state;
+ ahd_pci_write_config(ahd->dev_softc,
+ cap_offset + 4,
+ pm_control, /*bytes*/2);
+ break;
+ }
+ cap_offset = (cap >> 8) & 0xFF;
+ }
+#endif
}
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