/*******************************************************************
* This file is part of the Emulex Linux Device Driver for *
- * Enterprise Fibre Channel Host Bus Adapters. *
- * Refer to the README file included with this package for *
- * driver version and adapter support. *
- * Copyright (C) 2004 Emulex Corporation. *
+ * Fibre Channel Host Bus Adapters. *
+ * Copyright (C) 2004-2005 Emulex. All rights reserved. *
+ * EMULEX and SLI are trademarks of Emulex. *
* www.emulex.com *
* *
* This program is free software; you can redistribute it and/or *
- * modify it under the terms of the GNU General Public License *
- * as published by the Free Software Foundation; either version 2 *
- * of the License, or (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details, a copy of which *
- * can be found in the file COPYING included with this package. *
+ * modify it under the terms of version 2 of the GNU General *
+ * Public License as published by the Free Software Foundation. *
+ * This program is distributed in the hope that it will be useful. *
+ * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
+ * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
+ * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
+ * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
+ * TO BE LEGALLY INVALID. See the GNU General Public License for *
+ * more details, a copy of which can be found in the file COPYING *
+ * included with this package. *
*******************************************************************/
-/*
- * $Id: lpfc_hw.h 1.29 2004/11/18 17:28:05EST sf_support Exp $
- */
-
-#ifndef _H_LPFC_HW
-#define _H_LPFC_HW
+#define FDMI_DID 0xfffffaU
+#define NameServer_DID 0xfffffcU
+#define SCR_DID 0xfffffdU
+#define Fabric_DID 0xfffffeU
+#define Bcast_DID 0xffffffU
+#define Mask_DID 0xffffffU
+#define CT_DID_MASK 0xffff00U
+#define Fabric_DID_MASK 0xfff000U
+#define WELL_KNOWN_DID_MASK 0xfffff0U
-#define FDMI_DID ((uint32_t)0xfffffa)
-#define NameServer_DID ((uint32_t)0xfffffc)
-#define SCR_DID ((uint32_t)0xfffffd)
-#define Fabric_DID ((uint32_t)0xfffffe)
-#define Bcast_DID ((uint32_t)0xffffff)
-#define Mask_DID ((uint32_t)0xffffff)
-#define CT_DID_MASK ((uint32_t)0xffff00)
-#define Fabric_DID_MASK ((uint32_t)0xfff000)
-#define WELL_KNOWN_DID_MASK ((uint32_t)0xfffff0)
-
-#define PT2PT_LocalID ((uint32_t)1)
-#define PT2PT_RemoteID ((uint32_t)2)
+#define PT2PT_LocalID 1
+#define PT2PT_RemoteID 2
#define FF_DEF_EDTOV 2000 /* Default E_D_TOV (2000ms) */
#define FF_DEF_ALTOV 15 /* Default AL_TIME (15ms) */
#define FCELSSIZE 1024 /* maximum ELS transfer size */
-#define LPFC_FCP_RING 0 /* ring 2 for FCP initiator commands */
+#define LPFC_FCP_RING 0 /* ring 0 for FCP initiator commands */
#define LPFC_IP_RING 1 /* ring 1 for IP commands */
-#define LPFC_ELS_RING 2 /* ring 0 for ELS commands */
+#define LPFC_ELS_RING 2 /* ring 2 for ELS commands */
#define LPFC_FCP_NEXT_RING 3
#define SLI2_IOCB_CMD_R0_ENTRIES 172 /* SLI-2 FCP command ring entries */
#define FF_FRAME_SIZE 2048
struct lpfc_name {
+ union {
+ struct {
#ifdef __BIG_ENDIAN_BITFIELD
- uint8_t nameType:4; /* FC Word 0, bit 28:31 */
- uint8_t IEEEextMsn:4; /* FC Word 0, bit 24:27, bit 8:11 of IEEE ext */
+ uint8_t nameType:4; /* FC Word 0, bit 28:31 */
+ uint8_t IEEEextMsn:4; /* FC Word 0, bit 24:27, bit
+ 8:11 of IEEE ext */
#else /* __LITTLE_ENDIAN_BITFIELD */
- uint8_t IEEEextMsn:4; /* FC Word 0, bit 24:27, bit 8:11 of IEEE ext */
- uint8_t nameType:4; /* FC Word 0, bit 28:31 */
+ uint8_t IEEEextMsn:4; /* FC Word 0, bit 24:27, bit
+ 8:11 of IEEE ext */
+ uint8_t nameType:4; /* FC Word 0, bit 28:31 */
#endif
#define NAME_IEEE 0x1 /* IEEE name - nameType */
#define NAME_IP_TYPE 0x4 /* IP address */
#define NAME_CCITT_TYPE 0xC
#define NAME_CCITT_GR_TYPE 0xE
- uint8_t IEEEextLsb; /* FC Word 0, bit 16:23, IEEE extended Lsb */
- uint8_t IEEE[6]; /* FC IEEE address */
+ uint8_t IEEEextLsb; /* FC Word 0, bit 16:23, IEEE
+ extended Lsb */
+ uint8_t IEEE[6]; /* FC IEEE address */
+ } s;
+ uint8_t wwn[8];
+ } u;
};
struct csp {
/* Start FireFly Register definitions */
#define PCI_VENDOR_ID_EMULEX 0x10df
-#define PCI_DEVICE_ID_FIREFLY 0x1ae5
-#define PCI_DEVICE_ID_SUPERFLY 0xf700
-#define PCI_DEVICE_ID_DRAGONFLY 0xf800
+#define PCI_DEVICE_ID_FIREFLY 0x1ae5
#define PCI_DEVICE_ID_RFLY 0xf095
#define PCI_DEVICE_ID_PFLY 0xf098
+#define PCI_DEVICE_ID_LP101 0xf0a1
#define PCI_DEVICE_ID_TFLY 0xf0a5
+#define PCI_DEVICE_ID_BSMB 0xf0d1
+#define PCI_DEVICE_ID_BMID 0xf0d5
+#define PCI_DEVICE_ID_ZSMB 0xf0e1
+#define PCI_DEVICE_ID_ZMID 0xf0e5
+#define PCI_DEVICE_ID_NEPTUNE 0xf0f5
+#define PCI_DEVICE_ID_NEPTUNE_SCSP 0xf0f6
+#define PCI_DEVICE_ID_NEPTUNE_DCSP 0xf0f7
+#define PCI_DEVICE_ID_SUPERFLY 0xf700
+#define PCI_DEVICE_ID_DRAGONFLY 0xf800
#define PCI_DEVICE_ID_CENTAUR 0xf900
#define PCI_DEVICE_ID_PEGASUS 0xf980
#define PCI_DEVICE_ID_THOR 0xfa00
#define PCI_DEVICE_ID_VIPER 0xfb00
+#define PCI_DEVICE_ID_LP10000S 0xfc00
+#define PCI_DEVICE_ID_LP11000S 0xfc10
+#define PCI_DEVICE_ID_LPE11000S 0xfc20
#define PCI_DEVICE_ID_HELIOS 0xfd00
-#define PCI_DEVICE_ID_BMID 0xf0d5
-#define PCI_DEVICE_ID_BSMB 0xf0d1
+#define PCI_DEVICE_ID_HELIOS_SCSP 0xfd11
+#define PCI_DEVICE_ID_HELIOS_DCSP 0xfd12
#define PCI_DEVICE_ID_ZEPHYR 0xfe00
-#define PCI_DEVICE_ID_ZMID 0xf0e5
-#define PCI_DEVICE_ID_ZSMB 0xf0e1
-#define PCI_DEVICE_ID_LP101 0xf0a1
+#define PCI_DEVICE_ID_ZEPHYR_SCSP 0xfe11
+#define PCI_DEVICE_ID_ZEPHYR_DCSP 0xfe12
+
+#define PCI_SUBSYSTEM_ID_LP11000S 0xfc11
+#define PCI_SUBSYSTEM_ID_LP11002S 0xfc12
+#define PCI_SUBSYSTEM_ID_LPE11000S 0xfc21
+#define PCI_SUBSYSTEM_ID_LPE11002S 0xfc22
+#define PCI_SUBSYSTEM_ID_LPE11010S 0xfc2A
#define JEDEC_ID_ADDRESS 0x0080001c
#define FIREFLY_JEDEC_ID 0x1ACC
/* Host Attention Register */
-#define HA_REG_OFFSET 0 /* Word offset from register base address */
+#define HA_REG_OFFSET 0 /* Byte offset from register base address */
#define HA_R0RE_REQ 0x00000001 /* Bit 0 */
#define HA_R0CE_RSP 0x00000002 /* Bit 1 */
/* Chip Attention Register */
-#define CA_REG_OFFSET 1 /* Word offset from register base address */
+#define CA_REG_OFFSET 4 /* Byte offset from register base address */
#define CA_R0CE_REQ 0x00000001 /* Bit 0 */
#define CA_R0RE_RSP 0x00000002 /* Bit 1 */
/* Host Status Register */
-#define HS_REG_OFFSET 2 /* Word offset from register base address */
+#define HS_REG_OFFSET 8 /* Byte offset from register base address */
#define HS_MBRDY 0x00400000 /* Bit 22 */
#define HS_FFRDY 0x00800000 /* Bit 23 */
/* Host Control Register */
-#define HC_REG_OFFSET 3 /* Word offset from register base address */
+#define HC_REG_OFFSET 12 /* Word offset from register base address */
#define HC_MBINT_ENA 0x00000001 /* Bit 0 */
#define HC_R0INT_ENA 0x00000002 /* Bit 1 */
#define DMP_NV_PARAMS 0x2
#define DMP_REGION_VPD 0xe
-#define DMP_VPD_SIZE 0x100
+#define DMP_VPD_SIZE 0x400 /* maximum amount of VPD */
+#define DMP_RSP_OFFSET 0x14 /* word 5 contains first word of rsp */
+#define DMP_RSP_SIZE 0x6C /* maximum of 27 words of rsp data */
/* Structure for MB Command CONFIG_PORT (0x88) */
} CONFIG_FARP_VAR;
/* Union of all Mailbox Command types */
-#define MAILBOX_CMD_WSIZE 32
+#define MAILBOX_CMD_WSIZE 32
+#define MAILBOX_CMD_SIZE (MAILBOX_CMD_WSIZE * sizeof(uint32_t))
typedef union {
uint32_t varWords[MAILBOX_CMD_WSIZE - 1];
* SLI-2 specific structures
*/
-typedef struct {
- uint32_t cmdPutInx;
- uint32_t rspGetInx;
-} HGP;
+struct lpfc_hgp {
+ __le32 cmdPutInx;
+ __le32 rspGetInx;
+};
-typedef struct {
- uint32_t cmdGetInx;
- uint32_t rspPutInx;
-} PGP;
+struct lpfc_pgp {
+ __le32 cmdGetInx;
+ __le32 rspPutInx;
+};
typedef struct _SLI2_DESC {
- HGP host[MAX_RINGS];
+ struct lpfc_hgp host[MAX_RINGS];
uint32_t unused1[16];
- PGP port[MAX_RINGS];
+ struct lpfc_pgp port[MAX_RINGS];
} SLI2_DESC;
typedef union {
SLI2_DESC s2;
} SLI_VAR;
-typedef volatile struct {
+typedef struct {
#ifdef __BIG_ENDIAN_BITFIELD
uint16_t mbxStatus;
uint8_t mbxCommand;
uint32_t fcpt_Length; /* transfer ready for IWRITE */
} FCPT_FIELDS64;
-typedef volatile struct _IOCB { /* IOCB structure */
+typedef struct _IOCB { /* IOCB structure */
union {
GENERIC_RSP grsp; /* Generic response */
XR_SEQ_FIELDS xrseq; /* XMIT / BCAST / RCV_SEQUENCE cmd */
else
return 0;
}
-
-#endif /* _H_LPFC_HW */
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