#include "sata_promise.h"
#define DRV_NAME "sata_promise"
-#define DRV_VERSION "1.00"
+#define DRV_VERSION "1.01"
enum {
static u32 pdc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg);
static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
-static int pdc_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
-static void pdc_dma_start(struct ata_queued_cmd *qc);
+static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
static irqreturn_t pdc_interrupt (int irq, void *dev_instance, struct pt_regs *regs);
static void pdc_eng_timeout(struct ata_port *ap);
static int pdc_port_start(struct ata_port *ap);
static void pdc_qc_prep(struct ata_queued_cmd *qc);
static void pdc_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf);
static void pdc_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf);
-static inline void pdc_dma_complete (struct ata_port *ap,
- struct ata_queued_cmd *qc, int have_err);
static void pdc_irq_clear(struct ata_port *ap);
static int pdc_qc_issue_prot(struct ata_queued_cmd *qc);
-static Scsi_Host_Template pdc_sata_sht = {
+static Scsi_Host_Template pdc_ata_sht = {
.module = THIS_MODULE,
.name = DRV_NAME,
+ .ioctl = ata_scsi_ioctl,
.queuecommand = ata_scsi_queuecmd,
.eh_strategy_handler = ata_scsi_error,
.can_queue = ATA_DEF_QUEUE,
.bios_param = ata_std_bios_param,
};
-static struct ata_port_operations pdc_sata_ops = {
+static struct ata_port_operations pdc_ata_ops = {
.port_disable = ata_port_disable,
.tf_load = pdc_tf_load_mmio,
- .tf_read = ata_tf_read_mmio,
- .check_status = ata_check_status_mmio,
+ .tf_read = ata_tf_read,
+ .check_status = ata_check_status,
.exec_command = pdc_exec_command_mmio,
+ .dev_select = ata_std_dev_select,
.phy_reset = pdc_phy_reset,
.qc_prep = pdc_qc_prep,
.qc_issue = pdc_qc_issue_prot,
static struct ata_port_info pdc_port_info[] = {
/* board_2037x */
{
- .sht = &pdc_sata_sht,
+ .sht = &pdc_ata_sht,
.host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
ATA_FLAG_SRST | ATA_FLAG_MMIO,
- .pio_mask = 0x03, /* pio3-4 */
+ .pio_mask = 0x1f, /* pio0-4 */
+ .mwdma_mask = 0x07, /* mwdma0-2 */
.udma_mask = 0x7f, /* udma0-6 ; FIXME */
- .port_ops = &pdc_sata_ops,
+ .port_ops = &pdc_ata_ops,
},
/* board_20319 */
{
- .sht = &pdc_sata_sht,
+ .sht = &pdc_ata_sht,
.host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
ATA_FLAG_SRST | ATA_FLAG_MMIO,
- .pio_mask = 0x03, /* pio3-4 */
+ .pio_mask = 0x1f, /* pio0-4 */
+ .mwdma_mask = 0x07, /* mwdma0-2 */
.udma_mask = 0x7f, /* udma0-6 ; FIXME */
- .port_ops = &pdc_sata_ops,
+ .port_ops = &pdc_ata_ops,
},
};
-static struct pci_device_id pdc_sata_pci_tbl[] = {
+static struct pci_device_id pdc_ata_pci_tbl[] = {
{ PCI_VENDOR_ID_PROMISE, 0x3371, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
board_2037x },
{ PCI_VENDOR_ID_PROMISE, 0x3373, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
board_2037x },
{ PCI_VENDOR_ID_PROMISE, 0x3376, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
board_2037x },
+ { PCI_VENDOR_ID_PROMISE, 0x3574, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ board_2037x },
+ { PCI_VENDOR_ID_PROMISE, 0x3d75, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ board_2037x },
+
{ PCI_VENDOR_ID_PROMISE, 0x3318, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
board_20319 },
{ PCI_VENDOR_ID_PROMISE, 0x3319, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
board_20319 },
+ { PCI_VENDOR_ID_PROMISE, 0x3d18, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+ board_20319 },
+
{ } /* terminate list */
};
-static struct pci_driver pdc_sata_pci_driver = {
+static struct pci_driver pdc_ata_pci_driver = {
.name = DRV_NAME,
- .id_table = pdc_sata_pci_tbl,
- .probe = pdc_sata_init_one,
+ .id_table = pdc_ata_pci_tbl,
+ .probe = pdc_ata_init_one,
.remove = ata_pci_remove_one,
};
static int pdc_port_start(struct ata_port *ap)
{
- struct pci_dev *pdev = ap->host_set->pdev;
+ struct device *dev = ap->host_set->dev;
struct pdc_port_priv *pp;
int rc;
}
memset(pp, 0, sizeof(*pp));
- pp->pkt = pci_alloc_consistent(pdev, 128, &pp->pkt_dma);
+ pp->pkt = dma_alloc_coherent(dev, 128, &pp->pkt_dma, GFP_KERNEL);
if (!pp->pkt) {
rc = -ENOMEM;
goto err_out_kfree;
static void pdc_port_stop(struct ata_port *ap)
{
- struct pci_dev *pdev = ap->host_set->pdev;
+ struct device *dev = ap->host_set->dev;
struct pdc_port_priv *pp = ap->private_data;
ap->private_data = NULL;
- pci_free_consistent(pdev, 128, pp->pkt, pp->pkt_dma);
+ dma_free_coherent(dev, 128, pp->pkt, pp->pkt_dma);
kfree(pp);
ata_port_stop(ap);
}
VPRINTK("ENTER\n");
- ata_qc_prep(qc);
-
- i = pdc_pkt_header(&qc->tf, qc->ap->prd_dma, qc->dev->devno, pp->pkt);
+ switch (qc->tf.protocol) {
+ case ATA_PROT_DMA:
+ ata_qc_prep(qc);
+ /* fall through */
- if (qc->tf.flags & ATA_TFLAG_LBA48)
- i = pdc_prep_lba48(&qc->tf, pp->pkt, i);
- else
- i = pdc_prep_lba28(&qc->tf, pp->pkt, i);
+ case ATA_PROT_NODATA:
+ i = pdc_pkt_header(&qc->tf, qc->ap->prd_dma,
+ qc->dev->devno, pp->pkt);
- pdc_pkt_footer(&qc->tf, pp->pkt, i);
-}
+ if (qc->tf.flags & ATA_TFLAG_LBA48)
+ i = pdc_prep_lba48(&qc->tf, pp->pkt, i);
+ else
+ i = pdc_prep_lba28(&qc->tf, pp->pkt, i);
-static inline void pdc_dma_complete (struct ata_port *ap,
- struct ata_queued_cmd *qc,
- int have_err)
-{
- u8 err_bit = have_err ? ATA_ERR : 0;
+ pdc_pkt_footer(&qc->tf, pp->pkt, i);
+ break;
- /* get drive status; clear intr; complete txn */
- ata_qc_complete(qc, ata_wait_idle(ap) | err_bit);
+ default:
+ break;
+ }
}
static void pdc_eng_timeout(struct ata_port *ap)
switch (qc->tf.protocol) {
case ATA_PROT_DMA:
- printk(KERN_ERR "ata%u: DMA timeout\n", ap->id);
- ata_qc_complete(qc, ata_wait_idle(ap) | ATA_ERR);
- break;
-
case ATA_PROT_NODATA:
- drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
-
- printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x\n",
- ap->id, qc->tf.command, drv_stat);
-
- ata_qc_complete(qc, drv_stat);
+ printk(KERN_ERR "ata%u: command timeout\n", ap->id);
+ ata_qc_complete(qc, ata_wait_idle(ap) | ATA_ERR);
break;
default:
switch (qc->tf.protocol) {
case ATA_PROT_DMA:
- pdc_dma_complete(ap, qc, have_err);
- handled = 1;
- break;
-
- case ATA_PROT_NODATA: /* command completion, but no data xfer */
- status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
- DPRINTK("BUS_NODATA (drv_stat 0x%X)\n", status);
+ case ATA_PROT_NODATA:
+ status = ata_wait_idle(ap);
if (have_err)
status |= ATA_ERR;
ata_qc_complete(qc, status);
return IRQ_NONE;
}
- spin_lock(&host_set->lock);
+ spin_lock(&host_set->lock);
- for (i = 0; i < host_set->n_ports; i++) {
+ writel(mask, mmio_base + PDC_INT_SEQMASK);
+
+ for (i = 0; i < host_set->n_ports; i++) {
VPRINTK("port %u\n", i);
ap = host_set->ports[i];
tmp = mask & (1 << (i + 1));
return IRQ_RETVAL(handled);
}
-static inline void pdc_dma_start(struct ata_queued_cmd *qc)
+static inline void pdc_packet_start(struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc->ap;
struct pdc_port_priv *pp = ap->private_data;
{
switch (qc->tf.protocol) {
case ATA_PROT_DMA:
- pdc_dma_start(qc);
+ case ATA_PROT_NODATA:
+ pdc_packet_start(qc);
return 0;
case ATA_PROT_ATAPI_DMA:
static void pdc_tf_load_mmio(struct ata_port *ap, struct ata_taskfile *tf)
{
- WARN_ON (tf->protocol == ATA_PROT_DMA);
- ata_tf_load_mmio(ap, tf);
+ WARN_ON (tf->protocol == ATA_PROT_DMA ||
+ tf->protocol == ATA_PROT_NODATA);
+ ata_tf_load(ap, tf);
}
static void pdc_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf)
{
- WARN_ON (tf->protocol == ATA_PROT_DMA);
- ata_exec_command_mmio(ap, tf);
+ WARN_ON (tf->protocol == ATA_PROT_DMA ||
+ tf->protocol == ATA_PROT_NODATA);
+ ata_exec_command(ap, tf);
}
-static void pdc_sata_setup_port(struct ata_ioports *port, unsigned long base)
+static void pdc_ata_setup_port(struct ata_ioports *port, unsigned long base)
{
port->cmd_addr = base;
port->data_addr = base;
writel(tmp, mmio + PDC_TBG_MODE);
readl(mmio + PDC_TBG_MODE); /* flush */
- set_current_state(TASK_UNINTERRUPTIBLE);
- schedule_timeout(msecs_to_jiffies(10) + 1);
+ msleep(10);
/* adjust slew rate control register. */
tmp = readl(mmio + PDC_SLEW_CTL);
writel(tmp, mmio + PDC_SLEW_CTL);
}
-static int pdc_sata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
+static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
{
static int printed_version;
struct ata_probe_ent *probe_ent = NULL;
unsigned long base;
void *mmio_base;
unsigned int board_idx = (unsigned int) ent->driver_data;
+ int pci_dev_busy = 0;
int rc;
if (!printed_version++)
return rc;
rc = pci_request_regions(pdev, DRV_NAME);
- if (rc)
+ if (rc) {
+ pci_dev_busy = 1;
goto err_out;
+ }
rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
if (rc)
}
memset(probe_ent, 0, sizeof(*probe_ent));
- probe_ent->pdev = pdev;
+ probe_ent->dev = pci_dev_to_dev(pdev);
INIT_LIST_HEAD(&probe_ent->node);
mmio_base = ioremap(pci_resource_start(pdev, 3),
probe_ent->sht = pdc_port_info[board_idx].sht;
probe_ent->host_flags = pdc_port_info[board_idx].host_flags;
probe_ent->pio_mask = pdc_port_info[board_idx].pio_mask;
+ probe_ent->mwdma_mask = pdc_port_info[board_idx].mwdma_mask;
probe_ent->udma_mask = pdc_port_info[board_idx].udma_mask;
probe_ent->port_ops = pdc_port_info[board_idx].port_ops;
probe_ent->irq_flags = SA_SHIRQ;
probe_ent->mmio_base = mmio_base;
- pdc_sata_setup_port(&probe_ent->port[0], base + 0x200);
- pdc_sata_setup_port(&probe_ent->port[1], base + 0x280);
+ pdc_ata_setup_port(&probe_ent->port[0], base + 0x200);
+ pdc_ata_setup_port(&probe_ent->port[1], base + 0x280);
probe_ent->port[0].scr_addr = base + 0x400;
probe_ent->port[1].scr_addr = base + 0x500;
case board_20319:
probe_ent->n_ports = 4;
- pdc_sata_setup_port(&probe_ent->port[2], base + 0x300);
- pdc_sata_setup_port(&probe_ent->port[3], base + 0x380);
+ pdc_ata_setup_port(&probe_ent->port[2], base + 0x300);
+ pdc_ata_setup_port(&probe_ent->port[3], base + 0x380);
probe_ent->port[2].scr_addr = base + 0x600;
probe_ent->port[3].scr_addr = base + 0x700;
err_out_regions:
pci_release_regions(pdev);
err_out:
- pci_disable_device(pdev);
+ if (!pci_dev_busy)
+ pci_disable_device(pdev);
return rc;
}
-static int __init pdc_sata_init(void)
+static int __init pdc_ata_init(void)
{
- return pci_module_init(&pdc_sata_pci_driver);
+ return pci_module_init(&pdc_ata_pci_driver);
}
-static void __exit pdc_sata_exit(void)
+static void __exit pdc_ata_exit(void)
{
- pci_unregister_driver(&pdc_sata_pci_driver);
+ pci_unregister_driver(&pdc_ata_pci_driver);
}
MODULE_AUTHOR("Jeff Garzik");
MODULE_DESCRIPTION("Promise SATA TX2/TX4 low-level driver");
MODULE_LICENSE("GPL");
-MODULE_DEVICE_TABLE(pci, pdc_sata_pci_tbl);
+MODULE_DEVICE_TABLE(pci, pdc_ata_pci_tbl);
+MODULE_VERSION(DRV_VERSION);
-module_init(pdc_sata_init);
-module_exit(pdc_sata_exit);
+module_init(pdc_ata_init);
+module_exit(pdc_ata_exit);