/*
- * Copyright (c) 2000-2002 by David Brownell
+ * Copyright (c) 2000-2004 by David Brownell
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
*/
#include <linux/config.h>
-
-#ifdef CONFIG_USB_DEBUG
- #define DEBUG
-#else
- #undef DEBUG
-#endif
-
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/dmapool.h>
*
* HISTORY:
*
+ * 2004-05-10 Root hub and PCI suspend/resume support; remote wakeup. (db)
* 2004-02-24 Replace pci_* with generic dma_* API calls (dsaxena@plexity.net)
* 2003-12-29 Rewritten high speed iso transfer support (by Michal Sojka,
* <sojkam@centrum.cz>, updates by DB).
* 2001-June Works with usb-storage and NEC EHCI on 2.4
*/
-#define DRIVER_VERSION "2003-Dec-29"
+#define DRIVER_VERSION "10 Dec 2004"
#define DRIVER_AUTHOR "David Brownell"
#define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
#define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */
#define EHCI_SHRINK_JIFFIES (HZ/200) /* async qh unlink delay */
-/* Initial IRQ latency: lower than default */
+/* Initial IRQ latency: faster than hw default */
static int log2_irq_thresh = 0; // 0 to 6
module_param (log2_irq_thresh, int, S_IRUGO);
MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
-#define INTR_MASK (STS_IAA | STS_FATAL | STS_ERR | STS_INT)
+/* initial park setting: slower than hw default */
+static unsigned park = 0;
+module_param (park, uint, S_IRUGO);
+MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
+
+#define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
/*-------------------------------------------------------------------------*/
* before driver shutdown. But it also seems to be caused by bugs in cardbus
* bridge shutdown: shutting down the bridge before the devices using it.
*/
-static int handshake (u32 *ptr, u32 mask, u32 done, int usec)
+static int handshake (void __iomem *ptr, u32 mask, u32 done, int usec)
{
u32 result;
return -ETIMEDOUT;
}
-/*
- * hc states include: unknown, halted, ready, running
- * transitional states are messy just now
- * trying to avoid "running" unless urbs are active
- * a "ready" hc can be finishing prefetched work
- */
-
/* force HC to halt state from unknown (EHCI spec section 2.3) */
static int ehci_halt (struct ehci_hcd *ehci)
{
u32 temp = readl (&ehci->regs->status);
+ /* disable any irqs left enabled by previous code */
+ writel (0, &ehci->regs->intr_enable);
+
if ((temp & STS_HALT) != 0)
return 0;
return handshake (&ehci->regs->status, STS_HALT, STS_HALT, 16 * 125);
}
+/* put TDI/ARC silicon into EHCI mode */
+static void tdi_reset (struct ehci_hcd *ehci)
+{
+ u32 __iomem *reg_ptr;
+ u32 tmp;
+
+ reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + 0x68);
+ tmp = readl (reg_ptr);
+ tmp |= 0x3;
+ writel (tmp, reg_ptr);
+}
+
/* reset a non-running (STS_HALT == 1) controller */
static int ehci_reset (struct ehci_hcd *ehci)
{
+ int retval;
u32 command = readl (&ehci->regs->command);
command |= CMD_RESET;
dbg_cmd (ehci, "reset", command);
writel (command, &ehci->regs->command);
- ehci->hcd.state = USB_STATE_HALT;
- return handshake (&ehci->regs->command, CMD_RESET, 0, 250 * 1000);
+ ehci_to_hcd(ehci)->state = HC_STATE_HALT;
+ ehci->next_statechange = jiffies;
+ retval = handshake (&ehci->regs->command, CMD_RESET, 0, 250 * 1000);
+
+ if (retval)
+ return retval;
+
+ if (ehci_is_TDI(ehci))
+ tdi_reset (ehci);
+
+ return retval;
}
/* idle the controller (from running) */
-static void ehci_ready (struct ehci_hcd *ehci)
+static void ehci_quiesce (struct ehci_hcd *ehci)
{
u32 temp;
#ifdef DEBUG
- if (!HCD_IS_RUNNING (ehci->hcd.state))
+ if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
BUG ();
#endif
/* wait for any schedule enables/disables to take effect */
- temp = 0;
- if (ehci->async->qh_next.qh)
- temp = STS_ASS;
- if (ehci->next_uframe != -1)
- temp |= STS_PSS;
+ temp = readl (&ehci->regs->command) << 10;
+ temp &= STS_ASS | STS_PSS;
if (handshake (&ehci->regs->status, STS_ASS | STS_PSS,
temp, 16 * 125) != 0) {
- ehci->hcd.state = USB_STATE_HALT;
+ ehci_to_hcd(ehci)->state = HC_STATE_HALT;
return;
}
/* hardware can take 16 microframes to turn off ... */
if (handshake (&ehci->regs->status, STS_ASS | STS_PSS,
0, 16 * 125) != 0) {
- ehci->hcd.state = USB_STATE_HALT;
+ ehci_to_hcd(ehci)->state = HC_STATE_HALT;
return;
}
}
/*-------------------------------------------------------------------------*/
+static void ehci_work(struct ehci_hcd *ehci, struct pt_regs *regs);
+
#include "ehci-hub.c"
#include "ehci-mem.c"
#include "ehci-q.c"
/*-------------------------------------------------------------------------*/
-static void ehci_work(struct ehci_hcd *ehci, struct pt_regs *regs);
-
static void ehci_watchdog (unsigned long param)
{
struct ehci_hcd *ehci = (struct ehci_hcd *) param;
spin_unlock_irqrestore (&ehci->lock, flags);
}
-#ifdef CONFIG_PCI
-
-/* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/...
- * off the controller (maybe it can boot from highspeed USB disks).
+/* Reboot notifiers kick in for silicon on any bus (not just pci, etc).
+ * This forcibly disables dma and IRQs, helping kexec and other cases
+ * where the next system software may expect clean state.
*/
-static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap)
-{
- if (cap & (1 << 16)) {
- int msec = 500;
-
- /* request handoff to OS */
- cap &= 1 << 24;
- pci_write_config_dword (to_pci_dev(ehci->hcd.self.controller), where, cap);
-
- /* and wait a while for it to happen */
- do {
- wait_ms (10);
- msec -= 10;
- pci_read_config_dword (to_pci_dev(ehci->hcd.self.controller), where, &cap);
- } while ((cap & (1 << 16)) && msec);
- if (cap & (1 << 16)) {
- ehci_err (ehci, "BIOS handoff failed (%d, %04x)\n",
- where, cap);
- return 1;
- }
- ehci_dbg (ehci, "BIOS handoff succeeded\n");
- }
- return 0;
-}
-
-#endif
-
static int
ehci_reboot (struct notifier_block *self, unsigned long code, void *null)
{
struct ehci_hcd *ehci;
ehci = container_of (self, struct ehci_hcd, reboot_notifier);
+ (void) ehci_halt (ehci);
/* make BIOS/etc use companion controller during reboot */
writel (0, &ehci->regs->configured_flag);
return 0;
}
-
-/* called by khubd or root hub init threads */
-
-static int ehci_hc_reset (struct usb_hcd *hcd)
+static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
{
- struct ehci_hcd *ehci = hcd_to_ehci (hcd);
- u32 temp;
- unsigned count = 256/4;
-
- spin_lock_init (&ehci->lock);
-
- ehci->caps = (struct ehci_caps *) hcd->regs;
- ehci->regs = (struct ehci_regs *) (hcd->regs +
- HC_LENGTH (readl (&ehci->caps->hc_capbase)));
- dbg_hcs_params (ehci, "reset");
- dbg_hcc_params (ehci, "reset");
-
-#ifdef CONFIG_PCI
- /* EHCI 0.96 and later may have "extended capabilities" */
- if (hcd->self.controller->bus == &pci_bus_type)
- temp = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params));
- else
- temp = 0;
- while (temp && count--) {
- u32 cap;
-
- pci_read_config_dword (to_pci_dev(ehci->hcd.self.controller),
- temp, &cap);
- ehci_dbg (ehci, "capability %04x at %02x\n", cap, temp);
- switch (cap & 0xff) {
- case 1: /* BIOS/SMM/... handoff */
- if (bios_handoff (ehci, temp, cap) != 0)
- return -EOPNOTSUPP;
- break;
- case 0x0a: /* appendix C */
- ehci_dbg (ehci, "debug registers, BAR %d offset %d\n",
- (cap >> 29) & 0x07, (cap >> 16) & 0x0fff);
- break;
- case 0: /* illegal reserved capability */
- ehci_warn (ehci, "illegal capability!\n");
- cap = 0;
- /* FALLTHROUGH */
- default: /* unknown */
- break;
- }
- temp = (cap >> 8) & 0xff;
- }
- if (!count) {
- ehci_err (ehci, "bogus capabilities ... PCI problems!\n");
- return -EIO;
- }
-#endif
+ unsigned port;
- /* cache this readonly data; minimize PCI reads */
- ehci->hcs_params = readl (&ehci->caps->hcs_params);
+ if (!HCS_PPC (ehci->hcs_params))
+ return;
- /* force HC to halt state */
- return ehci_halt (ehci);
+ ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down");
+ for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; )
+ (void) ehci_hub_control(ehci_to_hcd(ehci),
+ is_on ? SetPortFeature : ClearPortFeature,
+ USB_PORT_FEAT_POWER,
+ port--, NULL, 0);
+ msleep(20);
}
-static int ehci_start (struct usb_hcd *hcd)
-{
- struct ehci_hcd *ehci = hcd_to_ehci (hcd);
- u32 temp;
- struct usb_device *udev;
- struct usb_bus *bus;
- int retval;
- u32 hcc_params;
- u8 sbrn = 0;
-
- init_timer (&ehci->watchdog);
- ehci->watchdog.function = ehci_watchdog;
- ehci->watchdog.data = (unsigned long) ehci;
-
- /*
- * hw default: 1K periodic list heads, one per frame.
- * periodic_size can shrink by USBCMD update if hcc_params allows.
- */
- ehci->periodic_size = DEFAULT_I_TDPS;
- if ((retval = ehci_mem_init (ehci, GFP_KERNEL)) < 0)
- return retval;
-
- /* controllers may cache some of the periodic schedule ... */
- hcc_params = readl (&ehci->caps->hcc_params);
- if (HCC_ISOC_CACHE (hcc_params)) // full frame cache
- ehci->i_thresh = 8;
- else // N microframes cached
- ehci->i_thresh = 2 + HCC_ISOC_THRES (hcc_params);
-
- ehci->reclaim = 0;
- ehci->next_uframe = -1;
-
- /* controller state: unknown --> reset */
-
- /* EHCI spec section 4.1 */
- if ((retval = ehci_reset (ehci)) != 0) {
- ehci_mem_cleanup (ehci);
- return retval;
- }
- writel (INTR_MASK, &ehci->regs->intr_enable);
- writel (ehci->periodic_dma, &ehci->regs->frame_list);
-
-#ifdef CONFIG_PCI
- if (hcd->self.controller->bus == &pci_bus_type) {
- struct pci_dev *pdev;
-
- pdev = to_pci_dev(hcd->self.controller);
-
- /* Serial Bus Release Number is at PCI 0x60 offset */
- pci_read_config_byte(pdev, 0x60, &sbrn);
-
- /* help hc dma work well with cachelines */
- pci_set_mwi (pdev);
-
- /* chip-specific init */
- switch (pdev->vendor) {
- case PCI_VENDOR_ID_ARC:
- if (pdev->device == PCI_DEVICE_ID_ARC_EHCI)
- ehci->is_arc_rh_tt = 1;
- break;
- }
-
- }
-#endif
-
- /*
- * dedicate a qh for the async ring head, since we couldn't unlink
- * a 'real' qh without stopping the async schedule [4.8]. use it
- * as the 'reclamation list head' too.
- * its dummy is used in hw_alt_next of many tds, to prevent the qh
- * from automatically advancing to the next td after short reads.
- */
- ehci->async->qh_next.qh = 0;
- ehci->async->hw_next = QH_NEXT (ehci->async->qh_dma);
- ehci->async->hw_info1 = cpu_to_le32 (QH_HEAD);
- ehci->async->hw_token = cpu_to_le32 (QTD_STS_HALT);
- ehci->async->hw_qtd_next = EHCI_LIST_END;
- ehci->async->qh_state = QH_STATE_LINKED;
- ehci->async->hw_alt_next = QTD_NEXT (ehci->async->dummy->qtd_dma);
- writel ((u32)ehci->async->qh_dma, &ehci->regs->async_next);
-
- /*
- * hcc_params controls whether ehci->regs->segment must (!!!)
- * be used; it constrains QH/ITD/SITD and QTD locations.
- * pci_pool consistent memory always uses segment zero.
- * streaming mappings for I/O buffers, like pci_map_single(),
- * can return segments above 4GB, if the device allows.
- *
- * NOTE: the dma mask is visible through dma_supported(), so
- * drivers can pass this info along ... like NETIF_F_HIGHDMA,
- * Scsi_Host.highmem_io, and so forth. It's readonly to all
- * host side drivers though.
- */
- if (HCC_64BIT_ADDR (hcc_params)) {
- writel (0, &ehci->regs->segment);
-#if 0
-// this is deeply broken on almost all architectures
- if (!pci_set_dma_mask (to_pci_dev(ehci->hcd.self.controller), 0xffffffffffffffffULL))
- ehci_info (ehci, "enabled 64bit PCI DMA\n");
-#endif
- }
-
- /* clear interrupt enables, set irq latency */
- temp = readl (&ehci->regs->command) & 0x0fff;
- if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
- log2_irq_thresh = 0;
- temp |= 1 << (16 + log2_irq_thresh);
- // if hc can park (ehci >= 0.96), default is 3 packets per async QH
- if (HCC_PGM_FRAMELISTLEN (hcc_params)) {
- /* periodic schedule size can be smaller than default */
- temp &= ~(3 << 2);
- temp |= (EHCI_TUNE_FLS << 2);
- switch (EHCI_TUNE_FLS) {
- case 0: ehci->periodic_size = 1024; break;
- case 1: ehci->periodic_size = 512; break;
- case 2: ehci->periodic_size = 256; break;
- default: BUG ();
- }
- }
- temp &= ~(CMD_IAAD | CMD_ASE | CMD_PSE),
- // Philips, Intel, and maybe others need CMD_RUN before the
- // root hub will detect new devices (why?); NEC doesn't
- temp |= CMD_RUN;
- writel (temp, &ehci->regs->command);
- dbg_cmd (ehci, "init", temp);
-
- /* set async sleep time = 10 us ... ? */
+/*-------------------------------------------------------------------------*/
- /* wire up the root hub */
- bus = hcd_to_bus (hcd);
- bus->root_hub = udev = usb_alloc_dev (NULL, bus, 0);
- if (!udev) {
-done2:
- ehci_mem_cleanup (ehci);
- return -ENOMEM;
- }
+/*
+ * ehci_work is called from some interrupts, timers, and so on.
+ * it calls driver completion functions, after dropping ehci->lock.
+ */
+static void ehci_work (struct ehci_hcd *ehci, struct pt_regs *regs)
+{
+ timer_action_done (ehci, TIMER_IO_WATCHDOG);
+ if (ehci->reclaim_ready)
+ end_unlink_async (ehci, regs);
- /*
- * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
- * are explicitly handed to companion controller(s), so no TT is
- * involved with the root hub.
+ /* another CPU may drop ehci->lock during a schedule scan while
+ * it reports urb completions. this flag guards against bogus
+ * attempts at re-entrant schedule scanning.
*/
- ehci->reboot_notifier.notifier_call = ehci_reboot;
- register_reboot_notifier (&ehci->reboot_notifier);
-
- ehci->hcd.state = USB_STATE_RUNNING;
- writel (FLAG_CF, &ehci->regs->configured_flag);
- readl (&ehci->regs->command); /* unblock posted write */
-
- temp = HC_VERSION(readl (&ehci->caps->hc_capbase));
- ehci_info (ehci,
- "USB %x.%x enabled, EHCI %x.%02x, driver %s\n",
- ((sbrn & 0xf0)>>4), (sbrn & 0x0f),
- temp >> 8, temp & 0xff, DRIVER_VERSION);
+ if (ehci->scanning)
+ return;
+ ehci->scanning = 1;
+ scan_async (ehci, regs);
+ if (ehci->next_uframe != -1)
+ scan_periodic (ehci, regs);
+ ehci->scanning = 0;
- /*
- * From here on, khubd concurrently accesses the root
- * hub; drivers will be talking to enumerated devices.
- *
- * Before this point the HC was idle/ready. After, khubd
- * and device drivers may start it running.
+ /* the IO watchdog guards against hardware or driver bugs that
+ * misplace IRQs, and should let us run completely without IRQs.
+ * such lossage has been observed on both VT6202 and VT8235.
*/
- udev->speed = USB_SPEED_HIGH;
- if (hcd_register_root (hcd) != 0) {
- if (hcd->state == USB_STATE_RUNNING)
- ehci_ready (ehci);
- ehci_reset (ehci);
- bus->root_hub = 0;
- usb_put_dev (udev);
- retval = -ENODEV;
- goto done2;
- }
-
- create_debug_files (ehci);
-
- return 0;
+ if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
+ (ehci->async->qh_next.ptr != NULL ||
+ ehci->periodic_sched != 0))
+ timer_action (ehci, TIMER_IO_WATCHDOG);
}
-/* always called by thread; normally rmmod */
-
static void ehci_stop (struct usb_hcd *hcd)
{
struct ehci_hcd *ehci = hcd_to_ehci (hcd);
ehci_dbg (ehci, "stop\n");
+ /* Turn off port power on all root hub ports. */
+ ehci_port_power (ehci, 0);
+
/* no more interrupts ... */
- if (hcd->state == USB_STATE_RUNNING)
- ehci_ready (ehci);
- if (in_interrupt ()) { /* must not happen!! */
- ehci_err (ehci, "stopped in_interrupt!\n");
- return;
- }
del_timer_sync (&ehci->watchdog);
+
+ spin_lock_irq(&ehci->lock);
+ if (HC_IS_RUNNING (hcd->state))
+ ehci_quiesce (ehci);
+
ehci_reset (ehci);
+ writel (0, &ehci->regs->intr_enable);
+ spin_unlock_irq(&ehci->lock);
/* let companion controllers work when we aren't */
writel (0, &ehci->regs->configured_flag);
dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status));
}
-static int ehci_get_frame (struct usb_hcd *hcd)
+/* one-time init, only for memory state */
+static int ehci_init(struct usb_hcd *hcd)
{
- struct ehci_hcd *ehci = hcd_to_ehci (hcd);
- return (readl (&ehci->regs->frame_index) >> 3) % ehci->periodic_size;
-}
-
-/*-------------------------------------------------------------------------*/
-
-#ifdef CONFIG_PM
-
-/* suspend/resume, section 4.3 */
+ struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+ u32 temp;
+ int retval;
+ u32 hcc_params;
-static int ehci_suspend (struct usb_hcd *hcd, u32 state)
-{
- struct ehci_hcd *ehci = hcd_to_ehci (hcd);
- int ports;
- int i;
+ spin_lock_init(&ehci->lock);
- ehci_dbg (ehci, "suspend to %d\n", state);
+ init_timer(&ehci->watchdog);
+ ehci->watchdog.function = ehci_watchdog;
+ ehci->watchdog.data = (unsigned long) ehci;
- ports = HCS_N_PORTS (ehci->hcs_params);
+ /*
+ * hw default: 1K periodic list heads, one per frame.
+ * periodic_size can shrink by USBCMD update if hcc_params allows.
+ */
+ ehci->periodic_size = DEFAULT_I_TDPS;
+ if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
+ return retval;
- // FIXME: This assumes what's probably a D3 level suspend...
+ /* controllers may cache some of the periodic schedule ... */
+ hcc_params = readl(&ehci->caps->hcc_params);
+ if (HCC_ISOC_CACHE(hcc_params)) // full frame cache
+ ehci->i_thresh = 8;
+ else // N microframes cached
+ ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
- // FIXME: usb wakeup events on this bus should resume the machine.
- // pci config register PORTWAKECAP controls which ports can do it;
- // bios may have initted the register...
+ ehci->reclaim = NULL;
+ ehci->reclaim_ready = 0;
+ ehci->next_uframe = -1;
- /* suspend each port, then stop the hc */
- for (i = 0; i < ports; i++) {
- int temp = readl (&ehci->regs->port_status [i]);
+ /*
+ * dedicate a qh for the async ring head, since we couldn't unlink
+ * a 'real' qh without stopping the async schedule [4.8]. use it
+ * as the 'reclamation list head' too.
+ * its dummy is used in hw_alt_next of many tds, to prevent the qh
+ * from automatically advancing to the next td after short reads.
+ */
+ ehci->async->qh_next.qh = NULL;
+ ehci->async->hw_next = QH_NEXT(ehci->async->qh_dma);
+ ehci->async->hw_info1 = cpu_to_le32(QH_HEAD);
+ ehci->async->hw_token = cpu_to_le32(QTD_STS_HALT);
+ ehci->async->hw_qtd_next = EHCI_LIST_END;
+ ehci->async->qh_state = QH_STATE_LINKED;
+ ehci->async->hw_alt_next = QTD_NEXT(ehci->async->dummy->qtd_dma);
- if ((temp & PORT_PE) == 0
- || (temp & PORT_OWNER) != 0)
- continue;
- ehci_dbg (ehci, "suspend port %d", i);
- temp |= PORT_SUSPEND;
- writel (temp, &ehci->regs->port_status [i]);
+ /* clear interrupt enables, set irq latency */
+ if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
+ log2_irq_thresh = 0;
+ temp = 1 << (16 + log2_irq_thresh);
+ if (HCC_CANPARK(hcc_params)) {
+ /* HW default park == 3, on hardware that supports it (like
+ * NVidia and ALI silicon), maximizes throughput on the async
+ * schedule by avoiding QH fetches between transfers.
+ *
+ * With fast usb storage devices and NForce2, "park" seems to
+ * make problems: throughput reduction (!), data errors...
+ */
+ if (park) {
+ park = min(park, (unsigned) 3);
+ temp |= CMD_PARK;
+ temp |= park << 8;
+ }
+ ehci_dbg(ehci, "park %d\n", park);
}
+ if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
+ /* periodic schedule size can be smaller than default */
+ temp &= ~(3 << 2);
+ temp |= (EHCI_TUNE_FLS << 2);
+ switch (EHCI_TUNE_FLS) {
+ case 0: ehci->periodic_size = 1024; break;
+ case 1: ehci->periodic_size = 512; break;
+ case 2: ehci->periodic_size = 256; break;
+ default: BUG();
+ }
+ }
+ ehci->command = temp;
- if (hcd->state == USB_STATE_RUNNING)
- ehci_ready (ehci);
- writel (readl (&ehci->regs->command) & ~CMD_RUN, &ehci->regs->command);
-
-// save pci FLADJ value
-
- /* who tells PCI to reduce power consumption? */
+ ehci->reboot_notifier.notifier_call = ehci_reboot;
+ register_reboot_notifier(&ehci->reboot_notifier);
return 0;
}
-static int ehci_resume (struct usb_hcd *hcd)
+/* start HC running; it's halted, ehci_init() has been run (once) */
+static int ehci_run (struct usb_hcd *hcd)
{
struct ehci_hcd *ehci = hcd_to_ehci (hcd);
- int ports;
- int i;
+ int retval;
+ u32 temp;
+ u32 hcc_params;
- ehci_dbg (ehci, "resume\n");
+ /* EHCI spec section 4.1 */
+ if ((retval = ehci_reset(ehci)) != 0) {
+ unregister_reboot_notifier(&ehci->reboot_notifier);
+ ehci_mem_cleanup(ehci);
+ return retval;
+ }
+ writel(ehci->periodic_dma, &ehci->regs->frame_list);
+ writel((u32)ehci->async->qh_dma, &ehci->regs->async_next);
- ports = HCS_N_PORTS (ehci->hcs_params);
+ /*
+ * hcc_params controls whether ehci->regs->segment must (!!!)
+ * be used; it constrains QH/ITD/SITD and QTD locations.
+ * pci_pool consistent memory always uses segment zero.
+ * streaming mappings for I/O buffers, like pci_map_single(),
+ * can return segments above 4GB, if the device allows.
+ *
+ * NOTE: the dma mask is visible through dma_supported(), so
+ * drivers can pass this info along ... like NETIF_F_HIGHDMA,
+ * Scsi_Host.highmem_io, and so forth. It's readonly to all
+ * host side drivers though.
+ */
+ hcc_params = readl(&ehci->caps->hcc_params);
+ if (HCC_64BIT_ADDR(hcc_params)) {
+ writel(0, &ehci->regs->segment);
+#if 0
+// this is deeply broken on almost all architectures
+ if (!dma_set_mask(hcd->self.controller, DMA_64BIT_MASK))
+ ehci_info(ehci, "enabled 64bit DMA\n");
+#endif
+ }
- // FIXME: if controller didn't retain state,
- // return and let generic code clean it up
- // test configured_flag ?
- /* resume HC and each port */
-// restore pci FLADJ value
- // khubd and drivers will set HC running, if needed;
- hcd->state = USB_STATE_RUNNING;
- // FIXME Philips/Intel/... etc don't really have a "READY"
- // state ... turn on CMD_RUN too
- for (i = 0; i < ports; i++) {
- int temp = readl (&ehci->regs->port_status [i]);
+ // Philips, Intel, and maybe others need CMD_RUN before the
+ // root hub will detect new devices (why?); NEC doesn't
+ ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
+ ehci->command |= CMD_RUN;
+ writel (ehci->command, &ehci->regs->command);
+ dbg_cmd (ehci, "init", ehci->command);
- if ((temp & PORT_PE) == 0
- || (temp & PORT_SUSPEND) != 0)
- continue;
- ehci_dbg (ehci, "resume port %d", i);
- temp |= PORT_RESUME;
- writel (temp, &ehci->regs->port_status [i]);
- readl (&ehci->regs->command); /* unblock posted writes */
-
- wait_ms (20);
- temp &= ~PORT_RESUME;
- writel (temp, &ehci->regs->port_status [i]);
- }
+ /*
+ * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
+ * are explicitly handed to companion controller(s), so no TT is
+ * involved with the root hub. (Except where one is integrated,
+ * and there's no companion controller unless maybe for USB OTG.)
+ */
+ hcd->state = HC_STATE_RUNNING;
+ writel (FLAG_CF, &ehci->regs->configured_flag);
readl (&ehci->regs->command); /* unblock posted writes */
- return 0;
-}
-#endif
+ temp = HC_VERSION(readl (&ehci->caps->hc_capbase));
+ ehci_info (ehci,
+ "USB %x.%x started, EHCI %x.%02x, driver %s\n",
+ ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
+ temp >> 8, temp & 0xff, DRIVER_VERSION);
-/*-------------------------------------------------------------------------*/
+ writel (INTR_MASK, &ehci->regs->intr_enable); /* Turn On Interrupts */
-/*
- * ehci_work is called from some interrupts, timers, and so on.
- * it calls driver completion functions, after dropping ehci->lock.
- */
-static void ehci_work (struct ehci_hcd *ehci, struct pt_regs *regs)
-{
- timer_action_done (ehci, TIMER_IO_WATCHDOG);
- if (ehci->reclaim_ready)
- end_unlink_async (ehci, regs);
- scan_async (ehci, regs);
- if (ehci->next_uframe != -1)
- scan_periodic (ehci, regs);
-
- /* the IO watchdog guards against hardware or driver bugs that
- * misplace IRQs, and should let us run completely without IRQs.
- * such lossage has been observed on both VT6202 and VT8235.
+ /* GRR this is run-once init(), being done every time the HC starts.
+ * So long as they're part of class devices, we can't do it init()
+ * since the class device isn't created that early.
*/
- if ((ehci->async->qh_next.ptr != 0) || (ehci->periodic_sched != 0))
- timer_action (ehci, TIMER_IO_WATCHDOG);
+ create_debug_files(ehci);
+
+ return 0;
}
/*-------------------------------------------------------------------------*/
status = readl (&ehci->regs->status);
- /* shared irq */
- if (status == 0) {
- spin_unlock (&ehci->lock);
- return IRQ_NONE;
- }
-
/* e.g. cardbus physical eject */
if (status == ~(u32) 0) {
ehci_dbg (ehci, "device removed\n");
}
status &= INTR_MASK;
- if (!status) /* irq sharing? */
- goto done;
+ if (!status) { /* irq sharing? */
+ spin_unlock(&ehci->lock);
+ return IRQ_NONE;
+ }
/* clear (just) interrupts */
writel (status, &ehci->regs->status);
bh = 0;
#ifdef EHCI_VERBOSE_DEBUG
- /* unrequested/ignored: Port Change Detect, Frame List Rollover */
+ /* unrequested/ignored: Frame List Rollover */
dbg_status (ehci, "irq", status);
#endif
bh = 1;
}
+ /* remote wakeup [4.3.1] */
+ if (status & STS_PCD) {
+ unsigned i = HCS_N_PORTS (ehci->hcs_params);
+
+ /* resume root hub? */
+ status = readl (&ehci->regs->command);
+ if (!(status & CMD_RUN))
+ writel (status | CMD_RUN, &ehci->regs->command);
+
+ while (i--) {
+ status = readl (&ehci->regs->port_status [i]);
+ if (status & PORT_OWNER)
+ continue;
+ if (!(status & PORT_RESUME)
+ || ehci->reset_done [i] != 0)
+ continue;
+
+ /* start 20 msec resume signaling from this port,
+ * and make khubd collect PORT_STAT_C_SUSPEND to
+ * stop that signaling.
+ */
+ ehci->reset_done [i] = jiffies + msecs_to_jiffies (20);
+ ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
+ usb_hcd_resume_root_hub(hcd);
+ }
+ }
+
/* PCI errors [4.15.2.4] */
if (unlikely ((status & STS_FATAL) != 0)) {
- ehci_err (ehci, "fatal error\n");
+ /* bogus "fatal" IRQs appear on some chips... why? */
+ status = readl (&ehci->regs->status);
+ dbg_cmd (ehci, "fatal", readl (&ehci->regs->command));
+ dbg_status (ehci, "fatal", status);
+ if (status & STS_HALT) {
+ ehci_err (ehci, "fatal error\n");
dead:
- ehci_reset (ehci);
- /* generic layer kills/unlinks all urbs, then
- * uses ehci_stop to clean up the rest
- */
- bh = 1;
+ ehci_reset (ehci);
+ writel (0, &ehci->regs->configured_flag);
+ /* generic layer kills/unlinks all urbs, then
+ * uses ehci_stop to clean up the rest
+ */
+ bh = 1;
+ }
}
if (bh)
ehci_work (ehci, regs);
-done:
spin_unlock (&ehci->lock);
return IRQ_HANDLED;
}
*/
static int ehci_urb_enqueue (
struct usb_hcd *hcd,
+ struct usb_host_endpoint *ep,
struct urb *urb,
- int mem_flags
+ gfp_t mem_flags
) {
struct ehci_hcd *ehci = hcd_to_ehci (hcd);
struct list_head qtd_list;
- urb->transfer_flags &= ~EHCI_STATE_UNLINK;
INIT_LIST_HEAD (&qtd_list);
switch (usb_pipetype (urb->pipe)) {
default:
if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
return -ENOMEM;
- return submit_async (ehci, urb, &qtd_list, mem_flags);
+ return submit_async (ehci, ep, urb, &qtd_list, mem_flags);
case PIPE_INTERRUPT:
if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
return -ENOMEM;
- return intr_submit (ehci, urb, &qtd_list, mem_flags);
+ return intr_submit (ehci, ep, urb, &qtd_list, mem_flags);
case PIPE_ISOCHRONOUS:
if (urb->dev->speed == USB_SPEED_HIGH)
}
}
+static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
+{
+ /* if we need to use IAA and it's busy, defer */
+ if (qh->qh_state == QH_STATE_LINKED
+ && ehci->reclaim
+ && HC_IS_RUNNING (ehci_to_hcd(ehci)->state)) {
+ struct ehci_qh *last;
+
+ for (last = ehci->reclaim;
+ last->reclaim;
+ last = last->reclaim)
+ continue;
+ qh->qh_state = QH_STATE_UNLINK_WAIT;
+ last->reclaim = qh;
+
+ /* bypass IAA if the hc can't care */
+ } else if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state) && ehci->reclaim)
+ end_unlink_async (ehci, NULL);
+
+ /* something else might have unlinked the qh by now */
+ if (qh->qh_state == QH_STATE_LINKED)
+ start_unlink_async (ehci, qh);
+}
+
/* remove from hardware lists
* completions normally happen asynchronously
*/
qh = (struct ehci_qh *) urb->hcpriv;
if (!qh)
break;
-
- /* if we need to use IAA and it's busy, defer */
- if (qh->qh_state == QH_STATE_LINKED
- && ehci->reclaim
- && HCD_IS_RUNNING (ehci->hcd.state)
- ) {
- struct ehci_qh *last;
-
- for (last = ehci->reclaim;
- last->reclaim;
- last = last->reclaim)
- continue;
- qh->qh_state = QH_STATE_UNLINK_WAIT;
- last->reclaim = qh;
-
- /* bypass IAA if the hc can't care */
- } else if (!HCD_IS_RUNNING (ehci->hcd.state) && ehci->reclaim)
- end_unlink_async (ehci, NULL);
-
- /* something else might have unlinked the qh by now */
- if (qh->qh_state == QH_STATE_LINKED)
- start_unlink_async (ehci, qh);
+ unlink_async (ehci, qh);
break;
case PIPE_INTERRUPT:
qh = (struct ehci_qh *) urb->hcpriv;
if (!qh)
break;
- if (qh->qh_state == QH_STATE_LINKED) {
- /* messy, can spin or block a microframe ... */
- intr_deschedule (ehci, qh, 1);
- /* qh_state == IDLE */
+ switch (qh->qh_state) {
+ case QH_STATE_LINKED:
+ intr_deschedule (ehci, qh);
+ /* FALL THROUGH */
+ case QH_STATE_IDLE:
+ qh_completions (ehci, qh, NULL);
+ break;
+ default:
+ ehci_dbg (ehci, "bogus qh %p state %d\n",
+ qh, qh->qh_state);
+ goto done;
}
- qh_completions (ehci, qh, NULL);
/* reschedule QH iff another request is queued */
if (!list_empty (&qh->qtd_list)
- && HCD_IS_RUNNING (ehci->hcd.state)) {
+ && HC_IS_RUNNING (hcd->state)) {
int status;
status = qh_schedule (ehci, qh);
// wait till next completion, do it then.
// completion irqs can wait up to 1024 msec,
- urb->transfer_flags |= EHCI_STATE_UNLINK;
break;
}
+done:
spin_unlock_irqrestore (&ehci->lock, flags);
return 0;
}
// bulk qh holds the data toggle
static void
-ehci_endpoint_disable (struct usb_hcd *hcd, struct hcd_dev *dev, int ep)
+ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
{
struct ehci_hcd *ehci = hcd_to_ehci (hcd);
- int epnum;
unsigned long flags;
- struct ehci_qh *qh;
+ struct ehci_qh *qh, *tmp;
/* ASSERT: any requests/urbs are being unlinked */
/* ASSERT: nobody can be submitting urbs for this any more */
- epnum = ep & USB_ENDPOINT_NUMBER_MASK;
- if (epnum != 0 && (ep & USB_DIR_IN))
- epnum |= 0x10;
-
rescan:
spin_lock_irqsave (&ehci->lock, flags);
- qh = (struct ehci_qh *) dev->ep [epnum];
+ qh = ep->hcpriv;
if (!qh)
goto done;
goto idle_timeout;
}
- if (!HCD_IS_RUNNING (ehci->hcd.state))
+ if (!HC_IS_RUNNING (hcd->state))
qh->qh_state = QH_STATE_IDLE;
switch (qh->qh_state) {
+ case QH_STATE_LINKED:
+ for (tmp = ehci->async->qh_next.qh;
+ tmp && tmp != qh;
+ tmp = tmp->qh_next.qh)
+ continue;
+ /* periodic qh self-unlinks on empty */
+ if (!tmp)
+ goto nogood;
+ unlink_async (ehci, qh);
+ /* FALL THROUGH */
case QH_STATE_UNLINK: /* wait for hw to finish? */
idle_timeout:
spin_unlock_irqrestore (&ehci->lock, flags);
- set_current_state (TASK_UNINTERRUPTIBLE);
- schedule_timeout (1);
+ schedule_timeout_uninterruptible(1);
goto rescan;
case QH_STATE_IDLE: /* fully unlinked */
if (list_empty (&qh->qtd_list)) {
- qh_put (ehci, qh);
+ qh_put (qh);
break;
}
/* else FALL THROUGH */
default:
+nogood:
/* caller was supposed to have unlinked any requests;
* that's not our job. just leak this memory.
*/
- ehci_err (ehci, "qh %p (#%d) state %d%s\n",
- qh, epnum, qh->qh_state,
+ ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
+ qh, ep->desc.bEndpointAddress, qh->qh_state,
list_empty (&qh->qtd_list) ? "" : "(has tds)");
break;
}
- dev->ep [epnum] = 0;
+ ep->hcpriv = NULL;
done:
spin_unlock_irqrestore (&ehci->lock, flags);
return;
}
-/*-------------------------------------------------------------------------*/
-
-static const struct hc_driver ehci_driver = {
- .description = hcd_name,
-
- /*
- * generic hardware linkage
- */
- .irq = ehci_irq,
- .flags = HCD_MEMORY | HCD_USB2,
-
- /*
- * basic lifecycle operations
- */
- .reset = ehci_hc_reset,
- .start = ehci_start,
-#ifdef CONFIG_PM
- .suspend = ehci_suspend,
- .resume = ehci_resume,
-#endif
- .stop = ehci_stop,
-
- /*
- * memory lifecycle (except per-request)
- */
- .hcd_alloc = ehci_hcd_alloc,
- .hcd_free = ehci_hcd_free,
-
- /*
- * managing i/o requests and associated device resources
- */
- .urb_enqueue = ehci_urb_enqueue,
- .urb_dequeue = ehci_urb_dequeue,
- .endpoint_disable = ehci_endpoint_disable,
-
- /*
- * scheduling support
- */
- .get_frame_number = ehci_get_frame,
-
- /*
- * root hub support
- */
- .hub_status_data = ehci_hub_status_data,
- .hub_control = ehci_hub_control,
-};
+static int ehci_get_frame (struct usb_hcd *hcd)
+{
+ struct ehci_hcd *ehci = hcd_to_ehci (hcd);
+ return (readl (&ehci->regs->frame_index) >> 3) % ehci->periodic_size;
+}
/*-------------------------------------------------------------------------*/
-/* EHCI 1.0 doesn't require PCI */
-
-#ifdef CONFIG_PCI
-
-/* PCI driver selection metadata; PCI hotplugging uses this */
-static const struct pci_device_id pci_ids [] = { {
- /* handle any USB 2.0 EHCI controller */
- PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x20), ~0),
- .driver_data = (unsigned long) &ehci_driver,
- },
- { /* end: all zeroes */ }
-};
-MODULE_DEVICE_TABLE (pci, pci_ids);
-
-/* pci driver glue; this is a "new style" PCI driver module */
-static struct pci_driver ehci_pci_driver = {
- .name = (char *) hcd_name,
- .id_table = pci_ids,
-
- .probe = usb_hcd_pci_probe,
- .remove = usb_hcd_pci_remove,
-
-#ifdef CONFIG_PM
- .suspend = usb_hcd_pci_suspend,
- .resume = usb_hcd_pci_resume,
-#endif
-};
-
-#endif /* PCI */
-
-
#define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
MODULE_DESCRIPTION (DRIVER_INFO);
MODULE_AUTHOR (DRIVER_AUTHOR);
MODULE_LICENSE ("GPL");
-static int __init init (void)
-{
- if (usb_disabled())
- return -ENODEV;
-
- pr_debug ("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
- hcd_name,
- sizeof (struct ehci_qh), sizeof (struct ehci_qtd),
- sizeof (struct ehci_itd), sizeof (struct ehci_sitd));
-
- return pci_module_init (&ehci_pci_driver);
-}
-module_init (init);
+#ifdef CONFIG_PCI
+#include "ehci-pci.c"
+#endif
-static void __exit cleanup (void)
-{
- pci_unregister_driver (&ehci_pci_driver);
-}
-module_exit (cleanup);
+#if !defined(CONFIG_PCI)
+#error "missing bus glue for ehci-hcd"
+#endif