#include <linux/config.h>
#include <linux/fb.h>
#include <video/vga.h>
+#include <linux/i2c.h>
+#include <linux/i2c-id.h>
+#include <linux/i2c-algo-bit.h>
+
#include "riva_hw.h"
/* GGI compatibility macros */
#define NUM_GRC_REGS 0x09
#define NUM_ATC_REGS 0x15
+/* I2C */
+#define DDC_SCL_READ_MASK (1 << 2)
+#define DDC_SCL_WRITE_MASK (1 << 5)
+#define DDC_SDA_READ_MASK (1 << 3)
+#define DDC_SDA_WRITE_MASK (1 << 4)
+
/* holds the state of the VGA core and extended Riva hw state from riva_hw.c.
* From KGI originally. */
struct riva_regs {
RIVA_HW_STATE ext;
};
+struct riva_par;
+
+struct riva_i2c_chan {
+ struct riva_par *par;
+ unsigned long ddc_base;
+ struct i2c_adapter adapter;
+ struct i2c_algo_bit_data algo;
+};
+
struct riva_par {
RIVA_HW_INST riva; /* interface to riva_hw.c */
u32 cursor_data[32 * 32/4];
int cursor_reset;
unsigned char *EDID;
-
- int panel_xres, panel_yres;
- int hOver_plus, hSync_width, hblank;
- int vOver_plus, vSync_width, vblank;
- int hAct_high, vAct_high, interlaced;
- int synct, misc, clock;
-
- int use_default_var;
- int got_dfpinfo;
unsigned int Chipset;
int forceCRTC;
Bool SecondCRTC;
int FlatPanel;
+ struct pci_dev *pdev;
+ int bus;
#ifdef CONFIG_MTRR
struct { int vram; int vram_valid; } mtrr;
#endif
+ struct riva_i2c_chan chan[3];
};
void riva_common_setup(struct riva_par *);
unsigned long riva_get_memlen(struct riva_par *);
unsigned long riva_get_maxdclk(struct riva_par *);
+void riva_delete_i2c_busses(struct riva_par *par);
+void riva_create_i2c_busses(struct riva_par *par);
+int riva_probe_i2c_connector(struct riva_par *par, int conn, u8 **out_edid);
#endif /* __RIVAFB_H */