/*
- * w1_io.c
+ * w1_io.c
*
* Copyright (c) 2004 Evgeniy Polyakov <johnpol@2ka.mipt.ru>
- *
+ *
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
*/
#include <asm/io.h>
-#include <asm/delay.h>
+#include <linux/delay.h>
#include <linux/moduleparam.h>
#include "w1.h"
udelay(tm * w1_delay_parm);
}
-void w1_write_bit(struct w1_master *dev, int bit)
+static void w1_write_bit(struct w1_master *dev, int bit);
+static u8 w1_read_bit(struct w1_master *dev);
+
+/**
+ * Generates a write-0 or write-1 cycle and samples the level.
+ */
+u8 w1_touch_bit(struct w1_master *dev, int bit)
+{
+ if (dev->bus_master->touch_bit)
+ return dev->bus_master->touch_bit(dev->bus_master->data, bit);
+ else if (bit)
+ return w1_read_bit(dev);
+ else {
+ w1_write_bit(dev, 0);
+ return(0);
+ }
+}
+
+/**
+ * Generates a write-0 or write-1 cycle.
+ * Only call if dev->bus_master->touch_bit is NULL
+ */
+static void w1_write_bit(struct w1_master *dev, int bit)
{
if (bit) {
dev->bus_master->write_bit(dev->bus_master->data, 0);
}
}
+/**
+ * Writes 8 bits.
+ *
+ * @param dev the master device
+ * @param byte the byte to write
+ */
void w1_write_8(struct w1_master *dev, u8 byte)
{
int i;
- for (i = 0; i < 8; ++i)
- w1_write_bit(dev, (byte >> i) & 0x1);
+ if (dev->bus_master->write_byte)
+ dev->bus_master->write_byte(dev->bus_master->data, byte);
+ else
+ for (i = 0; i < 8; ++i)
+ w1_touch_bit(dev, (byte >> i) & 0x1);
}
-u8 w1_read_bit(struct w1_master *dev)
+
+/**
+ * Generates a write-1 cycle and samples the level.
+ * Only call if dev->bus_master->touch_bit is NULL
+ */
+static u8 w1_read_bit(struct w1_master *dev)
{
int result;
return result & 0x1;
}
+/**
+ * Does a triplet - used for searching ROM addresses.
+ * Return bits:
+ * bit 0 = id_bit
+ * bit 1 = comp_bit
+ * bit 2 = dir_taken
+ * If both bits 0 & 1 are set, the search should be restarted.
+ *
+ * @param dev the master device
+ * @param bdir the bit to write if both id_bit and comp_bit are 0
+ * @return bit fields - see above
+ */
+u8 w1_triplet(struct w1_master *dev, int bdir)
+{
+ if ( dev->bus_master->triplet )
+ return(dev->bus_master->triplet(dev->bus_master->data, bdir));
+ else {
+ u8 id_bit = w1_touch_bit(dev, 1);
+ u8 comp_bit = w1_touch_bit(dev, 1);
+ u8 retval;
+
+ if ( id_bit && comp_bit )
+ return(0x03); /* error */
+
+ if ( !id_bit && !comp_bit ) {
+ /* Both bits are valid, take the direction given */
+ retval = bdir ? 0x04 : 0;
+ } else {
+ /* Only one bit is valid, take that direction */
+ bdir = id_bit;
+ retval = id_bit ? 0x05 : 0x02;
+ }
+
+ if ( dev->bus_master->touch_bit )
+ w1_touch_bit(dev, bdir);
+ else
+ w1_write_bit(dev, bdir);
+ return(retval);
+ }
+}
+
+/**
+ * Reads 8 bits.
+ *
+ * @param dev the master device
+ * @return the byte read
+ */
u8 w1_read_8(struct w1_master * dev)
{
int i;
u8 res = 0;
- for (i = 0; i < 8; ++i)
- res |= (w1_read_bit(dev) << i);
+ if (dev->bus_master->read_byte)
+ res = dev->bus_master->read_byte(dev->bus_master->data);
+ else
+ for (i = 0; i < 8; ++i)
+ res |= (w1_touch_bit(dev,1) << i);
return res;
}
+/**
+ * Writes a series of bytes.
+ *
+ * @param dev the master device
+ * @param buf pointer to the data to write
+ * @param len the number of bytes to write
+ * @return the byte read
+ */
+void w1_write_block(struct w1_master *dev, const u8 *buf, int len)
+{
+ int i;
+
+ if (dev->bus_master->write_block)
+ dev->bus_master->write_block(dev->bus_master->data, buf, len);
+ else
+ for (i = 0; i < len; ++i)
+ w1_write_8(dev, buf[i]);
+}
+
+/**
+ * Reads a series of bytes.
+ *
+ * @param dev the master device
+ * @param buf pointer to the buffer to fill
+ * @param len the number of bytes to read
+ * @return the number of bytes read
+ */
+u8 w1_read_block(struct w1_master *dev, u8 *buf, int len)
+{
+ int i;
+ u8 ret;
+
+ if (dev->bus_master->read_block)
+ ret = dev->bus_master->read_block(dev->bus_master->data, buf, len);
+ else {
+ for (i = 0; i < len; ++i)
+ buf[i] = w1_read_8(dev);
+ ret = len;
+ }
+
+ return ret;
+}
+
+/**
+ * Issues a reset bus sequence.
+ *
+ * @param dev The bus master pointer
+ * @return 0=Device present, 1=No device present or error
+ */
int w1_reset_bus(struct w1_master *dev)
{
int result;
- dev->bus_master->write_bit(dev->bus_master->data, 0);
- w1_delay(480);
- dev->bus_master->write_bit(dev->bus_master->data, 1);
- w1_delay(70);
+ if (dev->bus_master->reset_bus)
+ result = dev->bus_master->reset_bus(dev->bus_master->data) & 0x1;
+ else {
+ dev->bus_master->write_bit(dev->bus_master->data, 0);
+ w1_delay(480);
+ dev->bus_master->write_bit(dev->bus_master->data, 1);
+ w1_delay(70);
- result = dev->bus_master->read_bit(dev->bus_master->data) & 0x1;
- w1_delay(410);
+ result = dev->bus_master->read_bit(dev->bus_master->data) & 0x1;
+ w1_delay(410);
+ }
return result;
}
return crc;
}
-EXPORT_SYMBOL(w1_write_bit);
+void w1_search_devices(struct w1_master *dev, w1_slave_found_callback cb)
+{
+ dev->attempts++;
+ if (dev->bus_master->search)
+ dev->bus_master->search(dev->bus_master->data, cb);
+ else
+ w1_search(dev, cb);
+}
+
+/**
+ * Resets the bus and then selects the slave by sending either a skip rom
+ * or a rom match.
+ * The w1 master lock must be held.
+ *
+ * @param sl the slave to select
+ * @return 0=success, anything else=error
+ */
+int w1_reset_select_slave(struct w1_slave *sl)
+{
+ if (w1_reset_bus(sl->master))
+ return -1;
+
+ if (sl->master->slave_count == 1)
+ w1_write_8(sl->master, W1_SKIP_ROM);
+ else {
+ u8 match[9] = {W1_MATCH_ROM, };
+ memcpy(&match[1], (u8 *)&sl->reg_num, 8);
+ w1_write_block(sl->master, match, 9);
+ }
+ return 0;
+}
+
+EXPORT_SYMBOL(w1_touch_bit);
EXPORT_SYMBOL(w1_write_8);
-EXPORT_SYMBOL(w1_read_bit);
EXPORT_SYMBOL(w1_read_8);
EXPORT_SYMBOL(w1_reset_bus);
EXPORT_SYMBOL(w1_calc_crc8);
EXPORT_SYMBOL(w1_delay);
+EXPORT_SYMBOL(w1_read_block);
+EXPORT_SYMBOL(w1_write_block);
+EXPORT_SYMBOL(w1_search_devices);
+EXPORT_SYMBOL(w1_reset_select_slave);