#define FPCR_DYN_PLUS (0x3UL << FPCR_DYN_SHIFT) /* towards +INF */
#define FPCR_DYN_MASK (0x3UL << FPCR_DYN_SHIFT)
-#define FPCR_MASK 0xffff800000000000
+#define FPCR_MASK 0xffff800000000000L
/*
* IEEE trap enables are implemented in software. These per-thread
{
unsigned long tmp, ret;
-#if defined(__alpha_cix__) || defined(__alpha_fix__)
+#if defined(CONFIG_ALPHA_EV6) || defined(CONFIG_ALPHA_EV67)
__asm__ __volatile__ (
"ftoit $f0,%0\n\t"
"mf_fpcr $f0\n\t"
{
unsigned long tmp;
-#if defined(__alpha_cix__) || defined(__alpha_fix__)
+#if defined(CONFIG_ALPHA_EV6) || defined(CONFIG_ALPHA_EV67)
__asm__ __volatile__ (
"ftoit $f0,%0\n\t"
"itoft %1,$f0\n\t"