#include <asm/processor.h> /* For TASK_SIZE */
#include <asm/machvec.h>
+struct mm_struct;
+struct vm_area_struct;
+
/* Certain architectures need to do special things when PTEs
* within a page table are directly modified. Thus, the following
* hook is made available.
#define __S110 _PAGE_S(0)
#define __S111 _PAGE_S(0)
+/*
+ * pgprot_noncached() is only for infiniband pci support, and a real
+ * implementation for RAM would be more complicated.
+ */
+#define pgprot_noncached(prot) (prot)
+
/*
* BAD_PAGETABLE is used when we need a bogus page-table, while
* BAD_PAGE is used for a bogus page.
#define kern_addr_valid(addr) (1)
#endif
-#define io_remap_page_range(vma, start, busaddr, size, prot) \
-({ \
- void *va = (void __force *)ioremap(busaddr, size); \
- unsigned long pfn = virt_to_phys(va) >> PAGE_SHIFT; \
- remap_pfn_range(vma, start, pfn, size, prot); \
-})
-
#define io_remap_pfn_range(vma, start, pfn, size, prot) \
remap_pfn_range(vma, start, pfn, size, prot)