/* linux/include/asm-arm/arch-s3c2410/uncompress.h
*
- * (c) 2003 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
+ * Copyright (c) 2003 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
*
* S3C2410 - uncompress code
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
- *
- * Changelog:
- * 22-May-2003 BJD Created
- * 08-Sep-2003 BJD Moved to linux v2.6
- * 12-Mar-2004 BJD Updated header protection
- * 12-Oct-2004 BJD Take account of debug uart configuration
- * 15-Nov-2004 BJD Fixed uart configuration
- * 22-Feb-2005 BJD Added watchdog to uncompress
- * 04-Apr-2005 LCVR Added support to S3C2400 (no cpuid at GSTATUS1)
*/
#ifndef __ASM_ARCH_UNCOMPRESS_H
#define __ASM_ARCH_UNCOMPRESS_H
-#include <linux/config.h>
+typedef unsigned int upf_t; /* cannot include linux/serial_core.h */
/* defines for UART registers */
#include "asm/arch/regs-serial.h"
while (1) {
level = uart_rd(S3C2410_UFSTAT);
- if (cpuid == S3C2410_GSTATUS1_2440) {
+ if (cpuid == S3C2410_GSTATUS1_2440 ||
+ cpuid == S3C2410_GSTATUS1_2442) {
level &= S3C2440_UFSTAT_TXMASK;
level >>= S3C2440_UFSTAT_TXSHIFT;
} else {
{
__raw_writel(WDOG_COUNT, S3C2410_WTDAT);
__raw_writel(WDOG_COUNT, S3C2410_WTCNT);
- __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON);
+ __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x80), S3C2410_WTCON);
}
#else