linux 2.6.16.38 w/ vs2.0.3-rc1

[linux-2.6.git] / include / asm-arm / arch-sa1100 / hardware.h

diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h
index 10c62db..28711aa 100644 (file)
--- a/include/asm-arm/arch-sa1100/hardware.h
+++ b/include/asm-arm/arch-sa1100/hardware.h
@@ -21,13 +21,6 @@
 #define UNCACHEABLE_ADDR       0xfa050000
 
 
-/*
- * We requires absolute addresses i.e. (PCMCIA_IO_0_BASE + 0x3f8) for 
- * in*()/out*() macros to be usable for all cases.
- */
-#define PCIO_BASE              0
-
-
 /*
  * SA1100 internal I/O mappings
  *
@@ -49,23 +42,9 @@
    ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START )
 
 #ifndef __ASSEMBLY__
-#include <asm/types.h>
-
-#if 0
-# define __REG(x)      (*((volatile u32 *)io_p2v(x)))
-#else
-/*
- * This __REG() version gives the same results as the one above,  except
- * that we are fooling gcc somehow so it generates far better and smaller
- * assembly code for access to contigous registers.  It's a shame that gcc
- * doesn't guess this by itself.
- */
-typedef struct { volatile u32 offset[4096]; } __regbase;
-# define __REGP(x)     ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2]
-# define __REG(x)      __REGP(io_p2v(x))
-#endif
 
-# define __PREG(x)     (io_v2p((u32)&(x)))
+# define __REG(x)      (*((volatile unsigned long *)io_p2v(x)))
+# define __PREG(x)     (io_v2p((unsigned long)&(x)))
 
 #else