#define esr_disable (1)
#define NO_BALANCE_IRQ (0)
-#define NO_IOAPIC_CHECK (1) /* Don't check I/O APIC ID for xAPIC */
-
/* In clustered mode, the high nibble of APIC ID is a cluster number.
* The low nibble is a 4-bit bitmap. */
#define XAPIC_DEST_CPUS_SHIFT 4
static inline cpumask_t target_cpus(void)
{
- return CPU_MASK_ALL;
+ /* CPU_MASK_ALL (0xff) has undefined behaviour with
+ * dest_LowestPrio mode logical clustered apic interrupt routing
+ * Just start on cpu 0. IRQ balancing will spread load
+ */
+ return cpumask_of_cpu(0);
}
#define TARGET_CPUS (target_cpus())
-#define INT_DELIVERY_MODE (dest_Fixed)
+#define INT_DELIVERY_MODE (dest_LowestPrio)
#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)