fedora core 6 1.2949 + vserver 2.2.0
[linux-2.6.git] / include / asm-mips / futex.h
index 12d118f..47e5679 100644 (file)
@@ -1,20 +1,21 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (c) 2006  Ralf Baechle (ralf@linux-mips.org)
+ */
 #ifndef _ASM_FUTEX_H
 #define _ASM_FUTEX_H
 
 #ifdef __KERNEL__
 
-#include <linux/config.h>
 #include <linux/futex.h>
+#include <asm/barrier.h>
 #include <asm/errno.h>
 #include <asm/uaccess.h>
 #include <asm/war.h>
 
-#ifdef CONFIG_SMP
-#define __FUTEX_SMP_SYNC "     sync                                    \n"
-#else
-#define __FUTEX_SMP_SYNC
-#endif
-
 #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg)             \
 {                                                                      \
        if (cpu_has_llsc && R10000_LLSC_WAR) {                          \
                "       .set    push                            \n"     \
                "       .set    noat                            \n"     \
                "       .set    mips3                           \n"     \
-               "1:     ll      %1, (%3)        # __futex_atomic_op     \n" \
+               "1:     ll      %1, %4  # __futex_atomic_op     \n"     \
                "       .set    mips0                           \n"     \
                "       " insn  "                               \n"     \
                "       .set    mips3                           \n"     \
-               "2:     sc      $1, (%3)                        \n"     \
+               "2:     sc      $1, %2                          \n"     \
                "       beqzl   $1, 1b                          \n"     \
-               __FUTEX_SMP_SYNC                                        \
+               __WEAK_ORDERING_MB                                      \
                "3:                                             \n"     \
                "       .set    pop                             \n"     \
                "       .set    mips0                           \n"     \
                "       .section .fixup,\"ax\"                  \n"     \
-               "4:     li      %0, %5                          \n"     \
+               "4:     li      %0, %6                          \n"     \
                "       j       2b                              \n"     \
                "       .previous                               \n"     \
                "       .section __ex_table,\"a\"               \n"     \
                "       "__UA_ADDR "\t1b, 4b                    \n"     \
                "       "__UA_ADDR "\t2b, 4b                    \n"     \
                "       .previous                               \n"     \
-               : "=r" (ret), "=r" (oldval)                             \
-               : "0" (0), "r" (uaddr), "Jr" (oparg), "i" (-EFAULT));   \
+               : "=r" (ret), "=&r" (oldval), "=R" (*uaddr)             \
+               : "0" (0), "R" (*uaddr), "Jr" (oparg), "i" (-EFAULT)    \
+               : "memory");                                            \
        } else if (cpu_has_llsc) {                                      \
                __asm__ __volatile__(                                   \
                "       .set    push                            \n"     \
                "       .set    noat                            \n"     \
                "       .set    mips3                           \n"     \
-               "1:     ll      %1, (%3)        # __futex_atomic_op     \n" \
+               "1:     ll      %1, %4  # __futex_atomic_op     \n"     \
                "       .set    mips0                           \n"     \
                "       " insn  "                               \n"     \
                "       .set    mips3                           \n"     \
-               "2:     sc      $1, (%3)                        \n"     \
+               "2:     sc      $1, %2                          \n"     \
                "       beqz    $1, 1b                          \n"     \
-               __FUTEX_SMP_SYNC                                        \
+               __WEAK_ORDERING_MB                                      \
                "3:                                             \n"     \
                "       .set    pop                             \n"     \
                "       .set    mips0                           \n"     \
                "       .section .fixup,\"ax\"                  \n"     \
-               "4:     li      %0, %5                          \n"     \
+               "4:     li      %0, %6                          \n"     \
                "       j       2b                              \n"     \
                "       .previous                               \n"     \
                "       .section __ex_table,\"a\"               \n"     \
                "       "__UA_ADDR "\t1b, 4b                    \n"     \
                "       "__UA_ADDR "\t2b, 4b                    \n"     \
                "       .previous                               \n"     \
-               : "=r" (ret), "=r" (oldval)                             \
-               : "0" (0), "r" (uaddr), "Jr" (oparg), "i" (-EFAULT));   \
+               : "=r" (ret), "=&r" (oldval), "=R" (*uaddr)             \
+               : "0" (0), "R" (*uaddr), "Jr" (oparg), "i" (-EFAULT)    \
+               : "memory");                                            \
        } else                                                          \
                ret = -ENOSYS;                                          \
 }
@@ -85,34 +88,34 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
        if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
                return -EFAULT;
 
-       inc_preempt_count();
+       pagefault_disable();
 
        switch (op) {
        case FUTEX_OP_SET:
-               __futex_atomic_op("move $1, %z4", ret, oldval, uaddr, oparg);
+               __futex_atomic_op("move $1, %z5", ret, oldval, uaddr, oparg);
                break;
 
        case FUTEX_OP_ADD:
-               __futex_atomic_op("addu $1, %1, %z4",
+               __futex_atomic_op("addu $1, %1, %z5",
                                  ret, oldval, uaddr, oparg);
                break;
        case FUTEX_OP_OR:
-               __futex_atomic_op("or   $1, %1, %z4",
+               __futex_atomic_op("or   $1, %1, %z5",
                                  ret, oldval, uaddr, oparg);
                break;
        case FUTEX_OP_ANDN:
-               __futex_atomic_op("and  $1, %1, %z4",
+               __futex_atomic_op("and  $1, %1, %z5",
                                  ret, oldval, uaddr, ~oparg);
                break;
        case FUTEX_OP_XOR:
-               __futex_atomic_op("xor  $1, %1, %z4",
+               __futex_atomic_op("xor  $1, %1, %z5",
                                  ret, oldval, uaddr, oparg);
                break;
        default:
                ret = -ENOSYS;
        }
 
-       dec_preempt_count();
+       pagefault_enable();
 
        if (!ret) {
                switch (cmp) {
@@ -149,7 +152,7 @@ futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
                "       .set    mips3                                   \n"
                "2:     sc      $1, %1                                  \n"
                "       beqzl   $1, 1b                                  \n"
-               __FUTEX_SMP_SYNC
+               __WEAK_ORDERING_MB
                "3:                                                     \n"
                "       .set    pop                                     \n"
                "       .section .fixup,\"ax\"                          \n"
@@ -176,7 +179,7 @@ futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
                "       .set    mips3                                   \n"
                "2:     sc      $1, %1                                  \n"
                "       beqz    $1, 1b                                  \n"
-               __FUTEX_SMP_SYNC
+               __WEAK_ORDERING_MB
                "3:                                                     \n"
                "       .set    pop                                     \n"
                "       .section .fixup,\"ax\"                          \n"